Datasheet > CD54HCT175_07

CD54HCT175_07

更新时间： 2024-11-04 05:18:03

品牌	Logo	应用领域
德州仪器 - TI		触发器
页数	文件大小	规格书
14页	422K
描述
High-Speed CMOS Logic Quad D-Type Flip-Flop with Reset

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中文翻译

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数据手册

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CD54HCT175_07 数据手册

CD54HC175, CD74HC175,

CD54HCT175, CD74HCT175

Data sheet acquired from Harris Semiconductor

SCHS160C

High-Speed CMOS Logic

Quad D-Type Flip-Flop with Reset

August 1997 - Revised October 2003

advantage of standard CMOS ICs and the ability to drive 10

LSTTL devices.

Features

• Common Clock and Asynchronous Reset on Four

D-Type Flip-Flops

Information at the D input is transferred to the Q, Q outputs on

the positive going edge of the clock pulse. All four Flip-Flops

are controlled by a common clock (CP) and a common reset

(MR). Resetting is accomplished by a low voltage level

independent of the clock. All four Q outputs are reset to a

logic 0 and all four Q outputs to a logic 1.

[ /Title

(CD74

HC175

• Positive Edge Pulse Triggering

• Complementary Outputs

• Buffered Inputs

CD74

HCT17

/Sub-

ject

(High

Speed

CMOS

Logic

Quad

D-

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

Ordering Information

TEMP. RANGE

PART NUMBER

CD54HC175F3A

CD54HCT175F3A

CD74HC175E

( C)

PACKAGE

16 Ld CERDIP

16 Ld PDIP

16 Ld SOIC

16 Ld PDIP

16 Ld SOIC

• Wide Operating Temperature Range . . . -55 C to 125 C

• Balanced Propagation Delay and Transition Times

-55 to 125

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

CD74HC175M

- High Noise Immunity: N = 30%, N = 30% of V

CD74HC175MT

CD74HC175M96

CD74HCT175E

CD74HCT175M

CD74HCT175MT

CD74HCT175M96

at V

= 5V

• HCT Types

- 4.5V to 5.5V Operation

Type

Flip-

- Direct LSTTL Input Logic Compatibility,

V = 0.8V (Max), V = 2V (Min)

- CMOS Input Compatibility, I ≤ 1µA at V , V

OL OH

Description

The ’HC175 and ’HCT175 are high speed Quad D-type Flip-

Flops with individual D-inputs and Q, Q complementary

outputs. The devices are fabricated using silicon gate CMOS

technology. They have the low power consumption

NOTE: When ordering, use the entire part number. The sufﬁx 96

denotes tape and reel. The sufﬁx T denotes a small-quantity reel of

250.

Pinout

CD54HC175, CD54HCT175

(CERDIP)

CD74HC175, CD74HCT175

(PDIP, SOIC)

TOP VIEW

GND

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...14

中文翻译

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与CD54HCT175_07相关器件

型号	品牌	获取价格	描述	数据表
CD54HCT175E	ETC	获取价格	Logic IC
CD54HCT175EN	ETC	获取价格	Logic IC
CD54HCT175F	RENESAS	获取价格	IC,FLIP-FLOP,QUAD,D TYPE,HCT-CMOS,DIP,16PIN,CERAMIC
CD54HCT175F/3	RENESAS	获取价格	HCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
CD54HCT175F/3A	RENESAS	获取价格	IC HCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, FF/Latch
CD54HCT175F3A	RENESAS	获取价格	IC,FLIP-FLOP,QUAD,D TYPE,HCT-CMOS,DIP,16PIN,CERAMIC
CD54HCT175F3A	TI	获取价格	High-Speed CMOS Logic Quad D-Type Flip-Flop with Reset
CD54HCT175M	ETC	获取价格	Logic IC
CD54HCT181E	ETC	获取价格	Logic IC
CD54HCT181EN	ETC	获取价格	Logic IC

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