CD54HC4351, CD74HC4351,
CD74HCT4351, CD74HC4352
Data sheet acquired from Harris Semiconductor
SCHS213C
High-Speed CMOS Logic
Analog Multiplexers/Demultiplexers with Latch
September 1998 - Revised July 2003
CMOS technology to achieve operating speeds similar to
LSTTL with the low power consumption of standard CMOS
integrated circuits.
Features
• Wide Analog Input Voltage Range . . . . . . . . . ±5V (Max)
• Low “On” Resistance
[ /Title
(CD74
HC435
1,
CD74
HCT43
51,
CD74
HC435
2)
/Sub-
ject
(High
Speed
CMOS
Logic
Ana-
log
Multi-
plex-
ers/De
multi-
plex-
ers
These analog multiplexers/demultiplexers are, in essence,
the HC/HCT4015 and HC4052 preceded by address latches
that are controlled by an active low Latch Enable input (LE).
Two Enable inputs, one active low (E1), and the other active
high (E2) are provided allowing enabling with either input
voltage level.
- V
- V
- V = 4.5V. . . . . . . . . . . . . . . . . . . . . . 70Ω (Typ)
EE
- V = 9V . . . . . . . . . . . . . . . . . . . . . . . 40Ω (Typ)
EE
CC
CC
• Low Crosstalk Between Switches
• Fast Switching and Propagation Speeds
• “Break-Before-Make” Switching
Ordering Information
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
TEMP. RANGE
o
• HC Types
PART NUMBER
CD54HC4351F3A
CD74HC4351E
CD74HC4351M
CD74HC4351M96
CD74HCT4351E
CD74HC4352E
( C)
PACKAGE
20 Ld CERDIP
20 Ld PDIP
20 Ld SOIC
20 Ld SOIC
20 Ld PDIP
20 Ld PDIP
- 2V to 6V Operation, Control; 0V to 10V Switch
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation, Control; 0V to 10V Switch
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL
IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
Description
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel.
The ’HC4351, CD74HCT4351, and CD74HC4352 are
digitally controlled analog switches which utilize silicon-gate
Pinouts
CD54HC4351
(CERDIP)
CD74HC4351
(PDIP, SOIC)
CD74HCT4351
(PDIP)
CD74HC4352
(PDIP)
TOP VIEW
with
Latch)
/Autho
r ()
/Key-
words
(High
Speed
CMOS
Logic
1
2
3
4
5
6
7
8
9
V
B0
20
19
CC
B2
A2
TOP VIEW
NC
18 A1
B COMMON
17 A COMMON
16 A0
1
2
3
4
5
6
7
8
9
V
A4
20
19
CC
B3
B1
E1
E2
A6
A2
15 A3
NC
18 A1
17 A0
16 A3
15 S0
14 NC
13 S1
14 NC
A COMMON
13 S0
A7
A5
E1
E2
12
V
S1
EE
GND 10
11 LE
12
V
S2
EE
GND 10
11 LE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1