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CD54HC4015_08 PDF预览

CD54HC4015_08

更新时间: 2024-11-06 05:09:03
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德州仪器 - TI 移位寄存器
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11页 378K
描述
High Speed CMOS Logic Dual 4-Stage Static Shift Register

CD54HC4015_08 数据手册

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CD54HC4015, CD74HC4015  
Data sheet acquired from Harris Semiconductor  
SCHS198C  
High Speed CMOS Logic  
Dual 4-Stage Static Shift Register  
November 1997 - Revised May 2003  
Features  
Description  
• Maximum Frequency, Typically 60MHz  
o
The ’HC4015 consists of two identical, independent, 4-stage  
serial-input/parallel-output registers. Each register has  
independent Clock (CP) and Reset (MR) inputs as well as a  
single serial Data input. “Q” outputs are available from each  
of the four stages on both registers. All register stages are D-  
type, master-slave flip-flops. The logic level present at the  
Data input is transferred into the first register stage and  
shifted over one stage at each positive- going clock  
transition. Resetting of all stages is accomplished by a high  
level on the reset line.  
C = 15pF, V  
= 5V, T = 25 C  
A
L
CC  
[ /Title  
(CD74  
HC401  
5)  
/Sub-  
ject  
• Positive-Edge Clocking  
• Overriding Reset  
• Buffered Inputs and Outputs  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
(High  
Speed  
CMOS  
Logic  
Dual  
4-  
The device can drive up to 10 low power Schottky equivalent  
loads. The ’HC4015 is an enhanced version of equivalent  
CMOS types.  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
Ordering Information  
o
PART NUMBER  
CD54HC4015F3A  
CD74HC4015E  
TEMP. RANGE ( C)  
-55 to 125  
PACKAGE  
16 Ld CERDIP  
16 Ld PDIP  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
-55 to 125  
at V  
= 5V  
CC  
CD74HC4015M  
-55 to 125  
16 Ld SOIC  
Pinout  
CD54HC4015  
(CERDIP)  
CD74HC4015  
(PDIP, SOIC)  
TOP VIEW  
2CP  
1
2
3
4
5
6
7
8
16 V  
CC  
2Q  
1Q  
1Q  
1Q  
15 2D  
3
2
1
0
14 2MR  
13 2Q  
12 2Q  
11 2Q  
10 1Q  
0
1
2
3
1MR  
1D  
9
1CP  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

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