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CD4541BNSRE4 PDF预览

CD4541BNSRE4

更新时间： 2024-11-04 11:49:23
品牌 Logo 应用领域
德州仪器 - TI 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
17页 670K
描述
CMOS Programmable Timer High Voltage Types (20V Rating)

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中文翻译

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CD4541BNSRE4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：14
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.09Is Samacsys：N
计数方向：UP系列：4000/14000/40000
JESD-30 代码：R-PDSO-G14JESD-609代码：e4
长度：10.2 mm负载/预设输入：YES
逻辑集成电路类型：BINARY COUNTER工作模式：SYNCHRONOUS
湿度敏感等级：1位数：16
功能数量：1端子数量：14
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260传播延迟（tpd）：18000 ns
认证状态：Not Qualified座面最大高度：2 mm
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：5.3 mmBase Number Matches：1

CD4541BNSRE4 数据手册

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CD4541B  
CMOS Programmable Timer  
High Voltage Types (20V Rating)  
Data sheet acquired from Harris Semiconductor  
SCHS085E – Revised September 2003  
The output from this timer is the Q or Q output from the 8th,  
10th, 13th, or 16th counter stage. The desired stage is chosen  
using time-select inputs A and B (see Frequency Select Table).  
Features  
• Low Symmetrical Output Resistance, Typically 100Ω  
at V  
= 15V  
DD  
The output is available in either of two modes selectable via the  
MODE input, pin 10 (see Truth Table). When this MODE input is  
a logic “1”, the output will be a continuous square wave having  
[ /Title  
(CD45  
41B)  
/Sub-  
ject  
(CMO  
S Pro-  
gram-  
mable  
Timer  
High  
Volt-  
age  
Types  
(20V  
Rat-  
ing))  
/Autho  
r ()  
/Key-  
words  
(Har-  
ris  
Semi-  
con-  
ductor,  
CD400  
0,  
metal  
gate,  
• Built-In Low-Power RC Oscillator  
• Oscillator Frequency Range . . . . . . . . . . DC to 100kHz  
N
a frequency equal to the oscillator frequency divided by 2 .  
• External Clock (Applied to Pin 3) can be Used Instead  
of Oscillator  
With the MODE input set to logic “0” and after a MASTER  
N
RESET is initiated, the output (assuming Q output has been  
• Operates as 2 Frequency Divider or as a Single-  
N-1  
selected) changes from a low to a high state after 2  
counts  
Transition Timer  
and remains in that state until another MASTER RESET pulse  
is applied or the MODE input is set to a logic “1”.  
• Q/Q Select Provides Output Logic Level Flexibility  
• AUTO or MASTER RESET Disables Oscillator During  
Reset to Reduce Power Dissipation  
Timing is initialized by setting the AUTO RESET input (pin 5) to  
logic “0” and turning power on. If pin 5 is set to logic “1”, the  
AUTO RESET circuit is disabled and counting will not start until  
after a positive MASTER RESET pulse is applied and returns  
to a low level. The AUTO RESET consumes an appreciable  
amount of power and should not be used if low-power operation  
• Operates With Very Slow Clock Rise and Fall Times  
• Capable of Driving Six Low Power TTL Loads, Three  
Low-Power Schottky Loads, or Six HTL Loads Over  
the Rated Temperature Range  
is desired. For reliable automatic power-on reset, V  
be greater than 5V.  
should  
DD  
• Symmetrical Output Characteristics  
• 100% Tested for Quiescent Current at 20V  
• 5V, 10V, and 15V Parametric Ratings  
The RC oscillator, shown in Figure 2, oscillates with a  
frequency determined by the RC network and is calculated  
using:  
• Meets All Requirements of JEDEC Standard No. 13B,  
“Standard Specifications for Description of ‘B’ Series  
CMOS Devices”  
Where f is between 1kHz  
and 100kHz  
1
----------------------------------  
f =  
2.3 R  
C
TC TC  
and R ≥ 10kΩ and ≈ 2R  
S
TC  
Description  
CD4541B programmable timer consists of a 16-stage binary  
counter, an oscillator that is controlled by external R-C compo-  
nents (2 resistors and a capacitor), an automatic power-on  
reset circuit, and output control logic. The counter increments  
on positive-edge clock transitions and can also be reset via the  
MASTER RESET input.  
Ordering Information  
TEMP. RANGE  
o
PART NUMBER  
CD4541BF3A  
CD4541BE  
( C)  
PACKAGE  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOP  
CD4541BM  
CD4541BMT  
CD4541BM96  
CD4541BNSR  
CD4541BPW  
CD4541BPWR  
Pinout  
CD4541B  
(CERDIP, PDIP, SOIC, SOP, TSSOP)  
14 Ld TSSOP  
14 Ld TSSOP  
TOP VIEW  
CMOS  
, pdip,  
cerdip,  
mil,  
mili-  
tary,  
R
C
1
2
3
4
5
6
7
14  
13  
12  
V
DD  
TC  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
B
A
TC  
R
S
NC  
AUTO RESET  
11 NC  
10 MODE  
mil  
MASTER RESET  
9
8
Q/Q SELECT  
OUTPUT  
V
SS  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
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CD4541BNSRE4 替代型号

型号 品牌 替代类型 描述 数据表
CD4541BMT TI

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