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CD4503BMS PDF预览

CD4503BMS

更新时间: 2024-11-05 14:57:03
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
8页 310K
描述
CMOS Hex Buffer

CD4503BMS 技术参数

生命周期:Transferred包装说明:,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.56Is Samacsys:N
逻辑集成电路类型:BUS DRIVERBase Number Matches:1

CD4503BMS 数据手册

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DATASHEET  
CD4503BMS  
CMOS Hex Buffer  
FN3335  
Rev 0.00  
December 1992  
CD4503BMS is a hex noninverting buffer with 3 state  
outputs having high sink and source current capability. Two  
disable controls are provided, one of which controls four  
buffers and the other controls the remaining two buffers.  
Features  
• High Voltage Type (20V Rating)  
• 3 State Non-Inverting Type  
• 1 TTL Load Output Drive Capability  
• 2 Output Disable Controls  
• 3 State Outputs  
The CD4503BMS is supplied in these 16-lead outline packages:  
Braze Seal DIP  
Frit Seal DIP  
Ceramic Flatpack  
H4T  
H1E  
H6W  
• Pin Compatible with Industry Types MM80C97,  
MC14503, and 340097  
• 5V, 10V and 15V Parametric Ratings  
• Maximum Input Current of 1A at 18V Over Full Pack-  
o
age Temperature Range; 100nA at 18V and +25 C  
• Meets All Requirements of JEDEC Tentative Standard  
No. 13B, “Standard Specifications for Description of  
‘B’ Series CMOS Devices”  
Applications  
• 3 State Hex Buffer for Interfacing ICs with Data Buses  
• COS/MOS to TTL Hex Buffer  
Pinout  
Functional Diagram  
CD4503BMS  
TOP VIEW  
1
DISABLE A  
2
3
5
DIS A  
1
2
3
4
5
6
7
8
16 VDD  
15 DIS B  
14 D6  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
D1  
D2  
D3  
D4  
D5  
D1  
Q1  
4
D2  
13 DQ6  
12 D5  
6
7
Q2  
D3  
11 Q5  
10  
12  
9
10 D4  
Q3  
9
Q4  
VSS  
11  
13  
14  
15  
D6  
DISABLE B  
VDD = 16  
VSS = 8  
FN3335 Rev 0.00  
December 1992  
Page 1 of 8  

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