Datasheet > CD4069UBMS

CD4069UBMS

更新时间： 2024-11-05 14:58:11

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
8页	406K
描述
CMOS Hex Inverter

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CD4069UBMS 数据手册

DATASHEET

CD4069UBMS

CMOS Hex Inverter

FN3321

Rev 0.00

December 1992

Features

Pinout

CD4069UBMS

TOP VIEW

• High Voltage Types (20V Rating)

• Standardized Symmetrical Output Characteristics

• Medium Speed Operation: tPHL, tPLH = 30ns (typ) at

10V

G = A

14 VDD

12 L = F

10 K = E

• 100% Tested for Quiescent Current at 20V

• Maximum Input Current of 1A at 18V Over Full Pack-

age Temperature Range; 100nA at 18V and +25^oC

H = B

• Meets All Requirements of JEDEC Tentative Standard

No. 13B, “Standard Specifications for Description of

‘B’ Series CMOS Devices”

I = C

VSS

J = D

Applications

• Logic Inversion

• Pulse Shaping

Functional Diagram

• Oscillators

• High-Input-Impedance Amplifiers

G = A

H = B

I = C

Description

CD4069UBMS types consist of six CMOS inverter circuits.

These devices are intended for all general-purpose inverter

applications where the medium-power TTL-drive and logic-

level conversion capabilities of circuits such as the CD4009

and CD4049 Hex Inverter/Buffers are not required.

The CD4069UBMS is supplied in these 14 lead outline pack-

ages:

J = D

K = E

L = F

Braze Seal DIP

Frit Seal DIP

H4H

H1B

VSS = 7

Ceramic Flatpack H3W

VDD = 14

Schematic Diagram

VDD

G = A

1(3, 5, 9, 11, 13)

2(4, 6, 8, 10, 12)

VSS

FIGURE 1. SCHEMATIC DIAGRAM OF 1 OF 6 IDENTICAL INVERTERS

FN3321 Rev 0.00

December 1992

Page 1 of 8

12 3 4 5 6 7 8

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