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CD4044BCSJ PDF预览

CD4044BCSJ

更新时间: 2024-11-13 22:54:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
6页 71K
描述
Quad 3-STATE NOR R/S Latches . Quad 3-STATE NAND R/S Latches

CD4044BCSJ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.3
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.31
系列:4000/14000/40000JESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:10.2 mm
负载电容(CL):50 pF逻辑集成电路类型:R-S LATCH
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
Prop。Delay @ Nom-Sup:350 ns传播延迟(tpd):350 ns
认证状态:Not Qualified座面最大高度:2.1 mm
子类别:FF/Latches最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:LOW LEVEL宽度:5.3 mm
Base Number Matches:1

CD4044BCSJ 数据手册

 浏览型号CD4044BCSJ的Datasheet PDF文件第2页浏览型号CD4044BCSJ的Datasheet PDF文件第3页浏览型号CD4044BCSJ的Datasheet PDF文件第4页浏览型号CD4044BCSJ的Datasheet PDF文件第5页浏览型号CD4044BCSJ的Datasheet PDF文件第6页 
October 1987  
Revised January 1999  
CD4043BC • CD4044BC  
Quad 3-STATE NOR R/S Latches •  
Quad 3-STATE NAND R/S Latches  
General Description  
Features  
Wide supply voltage range: 3V to 15V  
The CD4043BC are quad cross-couple 3-STATE CMOS  
NOR latches, and the CD4044BC are quad cross-couple 3-  
STATE CMOS NAND latches. Each latch has a separate Q  
output and individual SET and RESET inputs. There is a  
common 3-STATE ENABLE input for all four latches. A  
logic “1” on the ENABLE input connects the latch states to  
the Q outputs. A logic “0” on the ENABLE input discon-  
nects the latch states from the Q outputs resulting in an  
open circuit condition on the Q output. The 3-STATE fea-  
ture allows common bussing of the outputs.  
Low power: 100 nW (typ.)  
High noise immunity: 0.45 VDD (typ.)  
Separate SET and RESET inputs for each latch  
NOR and NAND configuration  
3-STATE output with common output enable  
Applications  
Multiple bus storage  
Strobed register  
Four bits of independent storage with output enable  
General digital logic  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4043BCM  
CD4043BCN  
CD4044BCM  
CD4044BCSJ  
CD4044BCN  
M16A  
N16E  
M16A  
M16D  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
Pin Assignments for DIP, SOIC and SOP  
CD4043BC  
Pin Assignments for DIP and SOIC  
CD4044BC  
Top View  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005967.prf  
www.fairchildsemi.com  

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