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CD40192BCJ PDF预览

CD40192BCJ

更新时间: 2024-11-29 23:40:23
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页数 文件大小 规格书
6页 144K
描述
Synchronous Up/Down Counter

CD40192BCJ 数据手册

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February 1988  
CD40192BM/CD40192BC Synchronous  
4-Bit Up/Down Decade Counter  
CD40193BM/CD40193BC Synchronous  
4-Bit Up/Down Binary Counter  
General Description  
Features  
Y
Wide supply voltage range  
3V to 15V  
0.45 V (typ.)  
These up/down counters are monolithic complementary  
MOS (CMOS) integrated circuits. The CD40192BM and  
CD40192BC are BCD counters, while the CD40193BM and  
CD40193BC are binary counters.  
Y
High noise immunity  
DD  
Y
Low power TTL compatibility  
Fan out of 2  
driving 74L  
or 1 driving 74LS  
Counting up and counting down is performed by two count  
inputs, one being held high while the other is clocked. The  
outputs change on the positive-going transition of this clock.  
Y
Carry and borrow outputs for easy expansion to N-bit  
by cascading  
Y
Y
Asynchronous clear  
These counters feature preset inputs that are enabled when  
load is a logical ‘‘0’’ and a clear which forces all outputs to  
‘‘0’’ when it is at logical ‘‘1’’. The counters also have carry  
and borrow outputs so that they can be cascaded using no  
external circuitry.  
Equivalent to  
MM54C192/MM74C192  
and MM54C193/MM74C193  
All inputs are protected against damage due to static dis-  
.
SS  
charge by clamps to V  
and V  
DD  
Connection Diagram  
Dual-In-Line Package  
Order Number CD40192B or CD40193  
TL/F/5988–1  
Top View  
Cascading Packages  
TL/F/5988–2  
C
1995 National Semiconductor Corporation  
TL/F/5988  
RRD-B30M105/Printed in U. S. A.  

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