Datasheet > CD40160BDMSR

CD40160BDMSR

更新时间： 2024-11-14 14:48:23

品牌	Logo	应用领域
瑞萨 - RENESAS		逻辑集成电路触发器
页数	文件大小	规格书
13页	157K
描述
SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDIP16, BRAZE SEALED, DIP-16

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技术参数
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CD40160BDMSR 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP, DIP16,.3
针数：	16	Reach Compliance Code：	not_compliant
HTS代码：	8542.39.00.01	风险等级：	5.45
计数方向：	UP	JESD-30 代码：	R-CDIP-T16
JESD-609代码：	e0	负载电容（CL）：	50 pF
负载/预设输入：	YES	逻辑集成电路类型：	DECADE COUNTER
最大频率@ Nom-Sup：	2000000 Hz	最大I（ol）：	0.00036 A
工作模式：	SYNCHRONOUS	位数：	4
功能数量：	1	端子数量：	16
最高工作温度：	125 °C	最低工作温度：	-55 °C
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装代码：	DIP
封装等效代码：	DIP16,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	5/15 V	Prop。Delay @ Nom-Sup：	675 ns
传播延迟（tpd）：	540 ns	认证状态：	Not Qualified
筛选级别：	MIL-PRF-38535 Class V	座面最大高度：	5.08 mm
子类别：	Counters	标称供电电压 (Vsup)：	5 V
表面贴装：	NO	技术：	CMOS
温度等级：	MILITARY	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
总剂量：	100k Rad(Si) V	触发器类型：	POSITIVE EDGE
宽度：	7.62 mm	最小 fmax：	1.48 MHz
Base Number Matches：	1

CD40160BDMSR 数据手册

CD40160BMS, CD40161BMS, CD40162BMS,

CD40163BMS

December 1992

File Number 3358

CMOS Synchronous Programmable 4-Bit

Counters

Features

• High-Voltage Types (20V Rating)

• CD40160BMS Decade with Asynchronous Clear

• CD40161BMS Binary with Asynchronous Clear

• CD40162BMS Decade with Synchronous Clear

• CD40163BMS Binary with Synchronous Clear

• Internal Look-Ahead for Fast Counting

CD40160BMS,

CD40161BMS,

CD40162BMS

and

CD40163BMS are 4-bit synchronous programmable

counters. The CLEAR function of the CD40162BMS and

CD40163BMS is synchronous and a low level at the CLEAR

input sets all four outputs low on the next positive CLOCK

edge. The CLEAR function of the CD40160BMS and

CD40161BMS is asychronous and a low level at the CLEAR

input sets all four outputs low regardless of the state of the

CLOCK, LOAD, or ENABLE inputs. A low level at the LOAD

input disables the counter and causes the output to agree

with the setup data after the next CLOCK pulse regardless of

the conditions of the ENABLE inputs.

• Carry Output for Cascading

• Synchronously Programmable

• Clear Asynchronous Input (CD40160BMS, CD40161BMS)

• Clear Synchronous Input (CD40162BMS, CD40163BMS)

• Synchronous Load Control Input

• Low Power TTL Compatibility

The carry look-ahead circuitry provides for cascading counters

for n-bit synchronous applications without additional gating.

Instrumental in accomplishing this function are two count-enable

inputs and a carry output (COUT). Counting is enabled when

both PE and TE inputs are high. The TE input is fed forward to

enable COUT. This enabled output produces a positive output

pulses with a duration approximately equal to the positive portion

of the Q1 output. This positive overflow carry pulse can be used

to enable successive cascaded stages. Logic transitions at the

PE or TE inputs may occur when the clock is either high or low.

• Standardized Symmetrical Output Characteristics

• 100% Tested for Quiescent Current at 20V

• Maximum Input Current of 1µA at 18V Over Full Package

Temperature Range; 100nA at 18V and +25 C

• Noise Margin (Over Full Package Temperature Range):

1V at VDD = 5V

2V at VDD = 10V

2.5V at VDD = 15V

The CD40160BMS through CD40163BMS types are functionally

equivalent to and pin-compatible with the TTL counter series

74LS160 through 74LS163 respectively.

• 5V, 10V and 15V Parametric Ratings

• Meets All Requirements of JEDEC Tentative Standard No. 13B,

“Standard Specifications for Description of ‘B’ Series CMOS

Devices”

The CD40160BMS, CD40161BMS, CD40162BMS and

CD40163BMS are supplied in these 16 lead outline packages:

Applications

• Programmable Binary and Decade Counting

CD40160 CD40161 CD40162 CD40163

Braze Seal DIP

Frit Seal DIP

H4W

H1F

H6P

H4X

H1F

H6W

H4X

H1L

H6P

H4W

H1F

• Counter Control/Timers

• Frequency Dividing

Ceramic Flatpack

H6W

Pinout

Functional Diagram

CD40160BMS, CD40161BMS, CD40162BMS, CD40163BMS

TOP VIEW

CLEAR

CLOCK

16 VDD

15 CARRY OUT

14 Q1

CLEAR

LOAD

CLOCK

13 Q2

12 Q3

11 Q4

10 TE

VDD = 16

VSS = 8

CARRY

OUT

LOAD

VSS

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

4-1

12 3 4 5 6 7...13

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与CD40160BDMSR相关器件

型号	品牌	获取价格	描述	数据表
CD40160BE	TI	获取价格	4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDIP16, PLAS
CD40160BE	ROCHESTER	获取价格	4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDIP16
CD40160BEX	RENESAS	获取价格	IC,COUNTER,UP,DECADE,CMOS,DIP,16PIN,PLASTIC
CD40160BEX98	RENESAS	获取价格	CD40160BEX98
CD40160BF	TI	获取价格	4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDIP16, HERM
CD40160BF	ROCHESTER	获取价格	4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDIP16
CD40160BF	RENESAS	获取价格	IC,COUNTER,UP,DECADE,CMOS,DIP,16PIN,CERAMIC
CD40160BF3A	TI	获取价格	CMOS Synchronous Programmable 4-Bit Counters
CD40160BF3A	RENESAS	获取价格	IC,COUNTER,UP,DECADE,CMOS,DIP,16PIN,CERAMIC
CD40160BFX	ROCHESTER	获取价格	4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDIP16

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