CD40108BMS
CMOS 4 x 4 Multiport Register
December 1992
Features
Description
• High Voltage Type (20V Rating)
• Four 4-Bit Registers
The CD40108BMS is a 4 x 4 multiport register containing
four 4-bit registers, write address decoder, two separate
read address decoders, and two 3-state output buses.
• One Input and Two Output Buses
• Unlimited Expansion in Bit and Word Directions
• Data Lines have latched Inputs
• 3-State Outputs
When the ENABLE input is low, the corresponding output
bus is switched, independently of the clock, to a high-imped-
ance state. The high-impedance third state provides the out-
puts with the capability of being connected to the bus lines in
a bus-organized system without the need for interface or
pull-up components.
• Separate Control of Each Bus, Allowing Simultaneous
Independent Reading of Any of Four Registers on Bus
A and Bus B and Independent Writing Into Any of the
Four Registers
When the WRITE ENABLE input is high, all data input lines
are latched on the positive transition of the CLOCK and the
data is entered into the word selected by the write address
lines. When WRITE ENABLE is low, the CLOCK is inhibited
and no new data is entered. In either case, the contents of
any word may be accessed via the read address lines inde-
pendent of the state of the CLOCK input.
• CD40108BMS is Pin-Compatible with Industry Type
MC14580
• Standardized Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
The CD40108BMS is supplied in these 24-lead outline pack-
ages:
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
Braze Seal DIP
Ceramic Flatpack
H4V
H4P
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
Applications
- 2V at VDD = 10V
• Scratch-Pad Memories
• Arithmetic Units
• Data Storage
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Pinout
Functional Diagram
WRITE
3-STATE A
3
CD40108BMS
TOP VIEW
ENABLE
15
20
4
Q0
D0
19
5
6
7
1
2
3
4
5
6
7
8
9
24
VDD
Q3 B
Q2 B
Q1
Q2
Q3
D1
DATA
INPUTS
WORD A
OUTPUT
18
23 Q1 B
D2
17
22 Q0 B
3-STATE A
Q0 A
D3
21 3-STATE B
20 D0
8
WRITE 0
Q1 A
9
WRITE 1
19 D1
Q2 A
22
23
2
18 D2
Q3 A
14
Q0
Q1
Q2
Q3
READ 1A
17 D3
WRITE 0
WRITE 1
13
WORD B
OUTPUT
READ 0A
16 CLOCK
15 WRITE ENABLE
14 READ 1A
13 READ 0A
10
1
READ 1B 10
READ 0B 11
VSS 12
READ 1B
11
READ 0B
16
21
3-STATE B
VDD = 24
VSS = 12
CLOCK
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
File Number 3356
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