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CAT28C64BTI-12TE13 PDF预览

CAT28C64BTI-12TE13

更新时间: 2024-10-26 19:08:35
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
13页 74K
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CAT28C64BTI-12TE13 数据手册

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CAT28C64B  
64K-Bit CMOS PARALLEL EEPROM  
FEATURES  
Fast read access times:  
Commercial, industrial and automotive  
– 90/120/150ns  
temperature ranges  
Low power CMOS dissipation:  
– Active: 25 mA max.  
Automatic page write operation:  
– 1 to 32 bytes in 5ms  
– Standby: 100 µA max.  
– Page load timer  
Simple write operation:  
End of write detection:  
– Toggle bit  
– On-chip address and data latches  
– Self-timed write cycle with auto-clear  
DATA polling  
Fast write cycle time:  
100,000 program/erase cycles  
100 year data retention  
– 5ms max.  
CMOS and TTL compatible I/O  
Hardware and software write protection  
DESCRIPTION  
The CAT28C64B is manufactured using Catalyst’s  
advancedCMOSfloatinggatetechnology.Itisdesigned  
to endure 100,000 program/erase cycles and has a data  
retentionof100years.ThedeviceisavailableinJEDEC-  
approved 28-pin DIP, TSOP, SOIC, or, 32-pin PLCC  
package .  
The CAT28C64B is a fast, low power, 5V-only CMOS  
Parallel EEPROM organized as 8K x 8-bits. It requires a  
simple interface for in-system programming. On-chip  
address and data latches, self-timed write cycle with  
auto-clear and VCC power up/down write protection  
eliminate additional timing and protection hardware.  
DATA Polling and Toggle status bits signal the start and  
end of the self-timed write cycle. Additionally, the  
CAT28C64B features hardware and software write  
protection.  
BLOCK DIAGRAM  
8,192 x 8  
EEPROM  
ARRAY  
ROW  
DECODER  
ADDR. BUFFER  
& LATCHES  
A A  
5
12  
INADVERTENT  
WRITE  
PROTECTION  
HIGH VOLTAGE  
GENERATOR  
32 BYTE PAGE  
REGISTER  
V
CC  
CE  
OE  
WE  
CONTROL  
LOGIC  
I/O BUFFERS  
DATA POLLING  
AND  
TIMER  
TOGGLE BIT  
I/O I/O  
0
7
ADDR. BUFFER  
& LATCHES  
A A  
COLUMN  
DECODER  
0
4
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
Doc. No. MD-1011, Rev. I  
1

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