Datasheet > CAT28C64B_05

CAT28C64B_05

更新时间： 2024-10-28 05:08:39

品牌	Logo	应用领域
CATALYST		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
13页	415K
描述
64K-Bit CMOS PARALLEL EEPROM

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中文翻译

获取价格

数据手册

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CAT28C64B_05 数据手册

CAT28C64B

64K-Bit CMOS PARALLEL EEPROM

FEATURES

I Fast read access times:

I Commercial, industrial and automotive

– 90/120/150ns

temperature ranges

I Low power CMOS dissipation:

– Active: 25 mA max.

I Automatic page write operation:

– 1 to 32 bytes in 5ms

– Standby: 100 µA max.

– Page load timer

I Simple write operation:

I End of write detection:

– Toggle bit

– On-chip address and data latches

– Self-timed write cycle with auto-clear

– DATA polling

I Fast write cycle time:

I 100,000 program/erase cycles

I 100 year data retention

– 5ms max.

I CMOS and TTL compatible I/O

I Hardware and software write protection

DESCRIPTION

The CAT28C64B is manufactured using Catalyst’s

advancedCMOSfloatinggatetechnology.Itisdesigned

to endure 100,000 program/erase cycles and has a data

retentionof100years.ThedeviceisavailableinJEDEC-

approved 28-pin DIP, TSOP, SOIC, or, 32-pin PLCC

package .

The CAT28C64B is a fast, low power, 5V-only CMOS

Parallel EEPROM organized as 8K x 8-bits. It requires a

simple interface for in-system programming. On-chip

address and data latches, self-timed write cycle with

auto-clear and V_CCpower up/down write protection

eliminate additional timing and protection hardware.

DATA Polling and Toggle status bits signal the start and

end of the self-timed write cycle. Additionally, the

CAT28C64B features hardware and software write

protection.

BLOCK DIAGRAM

8,192 x 8

EEPROM

ARRAY

ROW

DECODER

ADDR. BUFFER

& LATCHES

A –A

INADVERTENT

WRITE

PROTECTION

HIGH VOLTAGE

GENERATOR

32 BYTE PAGE

CONTROL

LOGIC

I/O BUFFERS

DATA POLLING

AND

TIMER

TOGGLE BIT

I/O –I/O

ADDR. BUFFER

& LATCHES

A –A

COLUMN

DECODER

Doc. No. 1011, Rev. F

Characteristics subject to change without notice

12 3 4 5 6 7...13

中文翻译

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