Datasheet > CAT28C513T14I15T

CAT28C513T14I15T

更新时间： 2024-10-28 03:01:47

品牌	Logo	应用领域
CATALYST		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
11页	81K
描述
512K-Bit CMOS PARALLEL EEPROM

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数据手册

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CAT28C513T14I15T 数据手册

CAT28C512/513

512K-Bit CMOS PARALLEL EEPROM

FEATURES

■ Fast Read Access Times: 120/150 ns

■ Automatic Page Write Operation:

–1 to 128 Bytes in 5ms

■ Low Power CMOS Dissipation:

–Active: 50 mA Max.

–Page Load Timer

–Standby: 200 µA Max.

■ End of Write Detection:

–Toggle Bit

■ Simple Write Operation:

–DATA Polling

–On-Chip Address and Data Latches

–Self-Timed Write Cycle with Auto-Clear

■ Hardware and Software Write Protection

■ 100,000 Program/Erase Cycles

■ 100 Year Data Retention

■ Fast Write Cycle Time:

–5ms Max

■ CMOS and TTL Compatible I/O

■ Commercial, Industrial and Automotive

Temperature Ranges

DESCRIPTION

The CAT28C512/513 is manufactured using Catalyst’s

advancedCMOSfloatinggatetechnology.Itisdesigned

to endure 100,000 program/erase cycles and has a data

retention of 100 years. The device is available in JEDEC

approved 32-pin DIP, PLCC, 32-pin TSOP and 40-pin

TSOP packages.

TheCAT28C512/513isafast,lowpower,5V-onlyCMOS

parallel EEPROM organized as 64K x 8-bits. It requires

a simple interface for in-system programming. On-chip

address and data latches, self-timed write cycle with

auto-clear and V_CCpower up/down write protection

eliminate additional timing and protection hardware.

DATA Polling and Toggle status bits signal the start and

end of the self-timed write cycle. Additionally, the

CAT28C512/513 features hardware and software write

protection.

BLOCK DIAGRAM

65,536 x 8

E²PROM

ARRAY

ROW

DECODER

ADDR. BUFFER

A –A

& LATCHES

INADVERTENT

WRITE

PROTECTION

HIGH VOLTAGE

GENERATOR

128 BYTE PAGE

CONTROL

TIMER

I/O BUFFERS

DATA POLLING

AND

TOGGLE BIT

I/O –I/O

ADDR. BUFFER

& LATCHES

A –A

COLUMN

DECODER

5096 FHD F02

Characteristics subject to change without notice

Doc. No. 1007, Rev. A

12 3 4 5 6 7...11

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