Datasheet > CAT28C17AP-20

CAT28C17AP-20

更新时间： 2024-10-25 23:39:47

品牌	Logo	应用领域
其他 - ETC		内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
8页	48K
描述
x8 EEPROM

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中文翻译

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数据手册

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CAT28C17AP-20 数据手册

CAT28C17A

16K-Bit CMOS PARALLEL E²PROM

FEATURES

■ Fast Read Access Times: 200 ns

■ End of Write Detection:

–DATA Polling

■ Low Power CMOS Dissipation:

–Active: 25 mA Max.

–RDY/BSY Pin

–Standby: 100 µA Max.

■ Hardware Write Protection

■ CMOS and TTL Compatible I/O

■ 10,000 Program/Erase Cycles

■ 10 Year Data Retention

■ Simple Write Operation:

–On-Chip Address and Data Latches

–Self-Timed Write Cycle with Auto-Clear

■ Fast Write Cycle Time: 10ms Max

■ Commercial,Industrial and Automotive

Temperature Ranges

DESCRIPTION

The CAT28C17A is a fast, low power, 5V-only CMOS

parallel E²PROM organized as 2K x 8-bits. It requires a

simple interface for in-system programming. On-chip

address and data latches, self-timed write cycle with

auto-clear and V_CCpower up/down write protection

eliminate additional timing and protection hardware.

DATA Polling and a RDY/BSY pin signal the start and

end of the self-timed write cycle. Additionally, the

CAT28C17A features hardware write protection.

The CAT28C17A is manufactured using Catalyst’s ad-

vancedCMOSfloatinggatetechnology. Itisdesignedto

endure 10,000 program/erase cycles and has a data

retention of 10 years. The device is available in JEDEC

approved 28-pin DIP and SOIC or 32-pin PLCC pack-

ages.

BLOCK DIAGRAM

2,048 x 8

E²PROM

ARRAY

ROW

DECODER

ADDR. BUFFER

A –A

& LATCHES

INADVERTENT

WRITE

PROTECTION

HIGH VOLTAGE

GENERATOR

CONTROL

LOGIC

I/O BUFFERS

I/O –I/O

DATA POLLING

& RDY/BUSY

TIMER

ADDR. BUFFER

& LATCHES

A –A

COLUMN

DECODER

RDY/BUSY

5091 FHD F02

Doc. No. 25034-00 2/98

Characteristics subject to change without notice

12 3 4 5 6 7 8

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