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CAT25C128V16E-TE13 PDF预览

CAT25C128V16E-TE13

更新时间: 2024-10-28 18:47:55
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
12页 78K
描述
EEPROM, 16KX8, Serial, CMOS, PDSO16, LEAD AND HALOGEN FREE, SOIC-16

CAT25C128V16E-TE13 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:LEAD AND HALOGEN FREE, SOIC-16
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.75最大时钟频率 (fCLK):3 MHz
数据保留时间-最小值:100耐久性:100000 Write/Erase Cycles
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.905 mm内存密度:131072 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:16
字数:16384 words字数代码:16000
工作模式:SYNCHRONOUS最高工作温度:125 °C
最低工作温度:-40 °C组织:16KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:SERIAL
峰值回流温度(摄氏度):260电源:3/5 V
认证状态:Not Qualified座面最大高度:1.75 mm
串行总线类型:SPI最大待机电流:0.00001 A
子类别:EEPROMs最大压摆率:0.01 mA
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
最长写入周期时间 (tWC):10 ms写保护:HARDWARE/SOFTWARE
Base Number Matches:1

CAT25C128V16E-TE13 数据手册

 浏览型号CAT25C128V16E-TE13的Datasheet PDF文件第2页浏览型号CAT25C128V16E-TE13的Datasheet PDF文件第3页浏览型号CAT25C128V16E-TE13的Datasheet PDF文件第4页浏览型号CAT25C128V16E-TE13的Datasheet PDF文件第5页浏览型号CAT25C128V16E-TE13的Datasheet PDF文件第6页浏览型号CAT25C128V16E-TE13的Datasheet PDF文件第7页 
E
CAT25C128/256  
128K/256K-Bit SPI Serial CMOS EEPROM  
TM  
FEATURES  
100,000 Program/Erase Cycles  
100 Year Data Retention  
Self-Timed Write Cycle  
5 MHz SPI Compatible  
1.8 to 6.0 Volt Operation  
Hardware and Software Protection  
Low Power CMOS Technology  
SPI Modes (0,0 &1,1)*  
8-Pin DIP/SOIC, 16-Pin SOIC, 14-Pin TSSOP  
and 20-Pin TSSOP  
64-Byte Page Write Buffer  
Commercial, Industrial and Automotive  
Block Write Protection  
Temperature Ranges  
– Protect 1/4, 1/2 or all of EEPROM Array  
DESCRIPTION  
The CAT25C128/256 is a 128K/256K-Bit SPI Serial  
CMOS EEPROM internally organized as 16Kx8/32Kx8  
bits. Catalyst’s advanced CMOS Technology  
substantially reduces device power requirements. The  
CAT25C128/256 features a 64-byte page write buffer.  
The device operates via the SPI bus serial interface  
and is enabled through a Chip Select (CS). In addition  
to the Chip Select, the clock input (SCK), data in (SI)  
and data out (SO) are required to access the device.  
The HOLD pin may be used to suspend any serial  
communication without resetting the serial sequence.  
The CAT25C128/256 is designed with software and  
hardware write protection features including Block Lock  
protection. The device is available in 8-pin DIP, 8-pin  
SOIC, 16-pin SOIC, 14-pin TSSOP and 20-pin TSSOP  
packages.  
PIN CONFIGURATION  
BLOCK DIAGRAM  
TSSOP Package (U14, Y)**  
SOIC Package  
DIP Package (P, L)  
1
2
3
4
5
14  
13  
12  
11  
10  
(S**, K, V**, X)  
CS  
V
CC  
SENSE AMPS  
SHIFT REGISTERS  
1
2
3
4
8
7
6
5
V
CS  
SO  
CC  
SO  
NC  
HOLD  
NC  
1
2
3
4
8
7
6
5
V
CS  
SO  
WP  
CC  
HOLD  
SCK  
SI  
HOLD  
SCK  
SI  
WP  
NC  
NC  
WP  
NC  
NC  
SCK  
SI  
V
SS  
COLUMN  
DECODERS  
V
WORD ADDRESS  
BUFFERS  
SS  
6
7
9
8
V
SS  
SOIC Package (S16, V)**  
TSSOP Package (U20, Y)**  
SO  
SI  
I/O  
CONTROL  
16  
CS  
SO  
NC  
NC  
NC  
NC  
WP  
VSS  
1
2
3
4
5
6
7
8
V
1
2
3
4
5
20  
19  
18  
17  
16  
NC  
CS  
CC  
NC  
V
HOLD  
HOLD  
NC  
HOLD  
15  
14  
13  
12  
11  
10  
9
CC  
NC  
CS  
EEPROM  
ARRAY  
SO  
SO  
SPI  
CONTROL  
LOGIC  
XDEC  
NC  
WP  
NC  
NC  
WP  
NC  
HOLD  
SCK  
6
15  
14  
13  
12  
11  
NC  
SCK  
NC  
7
SCK  
SI  
V
SI  
NC  
NC  
8
BLOCK  
PROTECT  
LOGIC  
SS  
NC  
NC  
9
10  
PIN FUNCTIONS  
DATA IN  
STORAGE  
Pin Name  
Function  
SO  
SCK  
WP  
Serial data Output  
Serial Clock  
HIGH VOLTAGE/  
TIMING CONTROL  
Write Protect  
STATUS  
REGISTER  
VCC  
VSS  
+1.8V to +6.0V Power Supply  
Ground  
CS  
Chip Select  
SI  
HOLD  
NC  
Serial Data Input  
Suspends Serial Input  
No Connect  
* Other SPI modes available on request.  
**CAT25C128 only.  
© 2005 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Document No. 1018, Rev. G  
1

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