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CAT25C08SE-1.8 PDF预览

CAT25C08SE-1.8

更新时间: 2024-11-01 23:39:43
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页数 文件大小 规格书
11页 87K
描述
EEPROM

CAT25C08SE-1.8 数据手册

 浏览型号CAT25C08SE-1.8的Datasheet PDF文件第2页浏览型号CAT25C08SE-1.8的Datasheet PDF文件第3页浏览型号CAT25C08SE-1.8的Datasheet PDF文件第4页浏览型号CAT25C08SE-1.8的Datasheet PDF文件第5页浏览型号CAT25C08SE-1.8的Datasheet PDF文件第6页浏览型号CAT25C08SE-1.8的Datasheet PDF文件第7页 
E
CAT25C01/02/04/08/16  
1K/2K/4K/8K/16K SPI Serial CMOS EEPROM  
TM  
FEATURES  
1,000,000 program/erase cycles  
100 year data retention  
Self-timed write cycle  
10 MHz SPI compatible  
1.8 to 6.0 volt operation  
Hardware and software protection  
Zero standby current  
8-pin DIP/SOIC, 8/14-pin TSSOP and 8-pin MSOP  
16/32-byte page write buffer  
Low power CMOS technology  
SPI modes (0,0 & 1,1)*  
Block write protection  
– Protect 1/4, 1/2 or all of EEPROM array  
Commercial, industrial, automotive and  
extended temperature ranges  
DESCRIPTION  
input (SCK), data in (SI) and data out (SO) are required  
to access the device. The HOLD pin may be used to  
suspend any serial communication without resetting the  
serialsequence.TheCAT25C01/02/04/08/16isdesigned  
with software and hardware write protection features  
including Block Write protection. The device is available  
in 8-pin DIP, 8-pin SOIC, 8-pin MSOP and 8/14-pin  
TSSOP packages.  
The CAT25C01/02/04/08/16 is a 1K/2K/4K/8K/16K Bit  
SPI Serial CMOS EEPROM internally organized as  
128x8/256x8/512x8/1024x8/2048x8 bits. Catalyst’s  
advanced CMOS Technology substantially reduces  
device power requirements. The CAT25C01/02/04  
features a 16-byte page write buffer. The 25C08/16  
featuresa32-bytepagewritebuffer.Thedeviceoperates  
via the SPI bus serial interface and is enabled though a  
ChipSelect(CS).InadditiontotheChipSelect,theclock  
PIN CONFIGURATION  
TSSOP Package (U14, Y)  
SOIC Package (S, V)  
DIP Package (P, L)  
TSSOP Package (U, Y)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
CS  
SO  
NC  
NC  
V
1
2
3
4
8
7
6
5
V
V
CS  
CC  
CS  
SO  
CS  
SO  
WP  
CC  
V
CC  
CC  
HOLD  
SO  
HOLD  
SCK  
SI  
HOLD  
SCK  
SI  
HOLD  
SCK  
SI  
NC  
WP  
WP  
NC  
V
SS  
V
SS  
V
SS  
NC  
NC  
WP  
SCK  
SI  
V
BLOCK DIAGRAM  
SS  
8
MSOP Package (R, Z)*  
SENSE AMPS  
SHIFT REGISTERS  
1
2
3
4
8
7
6
5
CS  
SO  
WP  
V
CC  
HOLD  
SCK  
V
SI  
SS  
COLUMN  
DECODERS  
WORD ADDRESS  
BUFFERS  
*CAT25C01/02 only  
PIN FUNCTIONS  
Pin Name  
SO  
Function  
SO  
SI  
I/O  
CONTROL  
Serial Data Output  
Serial Clock  
E2PROM  
ARRAY  
CS  
SCK  
WP  
SPI  
CONTROL  
LOGIC  
XDEC  
WP  
HOLD  
SCK  
Write Protect  
VCC  
+1.8V to +6.0V Power Supply  
Ground  
BLOCK  
PROTECT  
LOGIC  
VSS  
CS  
Chip Select  
DATA IN  
STORAGE  
SI  
Serial Data Input  
Suspends Serial Input  
No Connect  
HOLD  
NC  
HIGH VOLTAGE/  
TIMING CONTROL  
STATUS  
REGISTER  
*Other SPI modes available on request.  
© 2002 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1016, Rev. H  
1

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