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CAT25C03GVATE13

更新时间： 2024-11-13 02:59:23
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
12页 305K
描述
1K/2K/4K/8K/16K SPI Serial CMOS EEPROM

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CAT25C03GVATE13 数据手册

 浏览型号CAT25C03GVATE13的Datasheet PDF文件第2页浏览型号CAT25C03GVATE13的Datasheet PDF文件第3页浏览型号CAT25C03GVATE13的Datasheet PDF文件第4页浏览型号CAT25C03GVATE13的Datasheet PDF文件第5页浏览型号CAT25C03GVATE13的Datasheet PDF文件第6页浏览型号CAT25C03GVATE13的Datasheet PDF文件第7页 
CAT25C11/03/05/09/17  
1K/2K/4K/8K/16K SPI Serial CMOS EEPROM  
FEATURES  
■ 10 MHz SPI compatible  
■ 1.8 to 6.0 volt operation  
■ Hardware and software protection  
■ Low power CMOS technology  
■ SPI modes (0,0 & 1,1)*  
■ 1,000,000 program/erase cycles  
■ 100 year data retention  
■ Self-timed write cycle  
■ 8-pin DIP/SOIC, 8-pin TSSOP and 8-pin MSOP  
■ 16/32-byte page write buffer  
■ Commercial, industrial, automotive and extended  
■ Write protection  
temperature ranges  
– Protect first page, last page, any 1/4 array or  
lower 1/2 array  
DESCRIPTION  
The CAT25C11/03/05/09/17 is a 1K/2K/4K/8K/16K-Bit  
SPI Serial CMOS EEPROM internally organized as  
128x8/256x8/512x8/1024x8/2048x8 bits. Catalyst’s  
advanced CMOS Technology substantially reduces  
device power requirements. The CAT25C11/03/05  
features a 16-byte page write buffer. The 25C09/17  
featuresa32-bytepagewritebuffer.Thedeviceoperates  
via the SPI bus serial interface and is enabled though a  
ChipSelect(CS).InadditiontotheChipSelect,theclock  
input (SCK), data in (SI) and data out (SO) are required  
to access the device. The HOLD pin may be used to  
suspend any serial communication without resetting the  
serialsequence.TheCAT25C11/03/05/09/17isdesigned  
with software and hardware write protection features  
including Block Write protection. The device is available  
in 8-pin DIP, 8-pin SOIC, 8/14-pin TSSOP and 8-pin  
MSOP packages.  
PIN CONFIGURATION  
DIP Package (P, L, GL)  
MSOP Package (R, Z, GZ)* SOIC Package (S, V, GV)  
TSSOP Package (U, Y, GY)  
1
2
3
4
8
7
6
5
CS  
SO  
WP  
V
CC  
HOLD  
SCK  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
V
V
CS  
SO  
WP  
CS  
SO  
CC  
CC  
1
2
3
4
8
7
6
5
CS  
V
CC  
HOLD  
SCK  
SI  
HOLD  
SCK  
SI  
SO  
HOLD  
SCK  
SI  
WP  
V
SI  
WP  
SS  
V
V
V
SS  
SS  
SS  
*CAT25C11/03 only  
BLOCK DIAGRAM  
SENSE AMPS  
SHIFT REGISTERS  
PIN FUNCTIONS  
Pin Name  
SO  
Function  
COLUMN  
DECODERS  
WORD ADDRESS  
BUFFERS  
Serial Data Output  
Serial Clock  
SCK  
WP  
SO  
SI  
I/O  
CONTROL  
Write Protect  
CS  
EEPROM  
ARRAY  
SPI  
CONTROL  
LOGIC  
XDEC  
VCC  
+1.8V to +6.0V Power Supply  
Ground  
WP  
HOLD  
SCK  
VSS  
CS  
Chip Select  
BLOCK  
PROTECT  
LOGIC  
SI  
Serial Data Input  
Suspends Serial Input  
No Connect  
HOLD  
NC  
DATA IN  
STORAGE  
HIGH VOLTAGE/  
TIMING CONTROL  
* Other SPI modes available on request.  
STATUS  
REGISTER  
© 2005 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 1017, Rev. L  
1
1234567...12

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