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CAT24C01BR-TE13 PDF预览

CAT24C01BR-TE13

更新时间: 2024-10-29 15:29:11
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管
页数 文件大小 规格书
7页 39K
描述
EEPROM, 128X8, Serial, CMOS, PDSO8, MSOP-8

CAT24C01BR-TE13 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:MSOP
包装说明:TSSOP, TSSOP8,.19针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.72
最大时钟频率 (fCLK):0.1 MHz数据保留时间-最小值:100
耐久性:1000000 Write/Erase CyclesJESD-30 代码:S-PDSO-G8
JESD-609代码:e0长度:3 mm
内存密度:1024 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:8字数:128 words
字数代码:128工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128X8封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.19
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:SERIAL峰值回流温度(摄氏度):240
电源:3/5 V认证状态:Not Qualified
座面最大高度:1.1 mm串行总线类型:I2C
最大待机电流:0.000001 A子类别:EEPROMs
最大压摆率:0.003 mA最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mm最长写入周期时间 (tWC):10 ms
Base Number Matches:1

CAT24C01BR-TE13 数据手册

 浏览型号CAT24C01BR-TE13的Datasheet PDF文件第2页浏览型号CAT24C01BR-TE13的Datasheet PDF文件第3页浏览型号CAT24C01BR-TE13的Datasheet PDF文件第4页浏览型号CAT24C01BR-TE13的Datasheet PDF文件第5页浏览型号CAT24C01BR-TE13的Datasheet PDF文件第6页浏览型号CAT24C01BR-TE13的Datasheet PDF文件第7页 
CAT24C01B  
1K-Bit Serial EEPROM  
FEATURES  
1,000,000 Program/Erase Cycles  
100 Year Data Retention  
2-Wire Serial Interface  
1.8 to 6.0Volt Operation  
8-pin DIP, 8-pin SOIC, 8 pin TSSOP or 8-pin MSOP  
Low Power CMOS Technology  
4-Byte Page Write Buffer  
Commercial, Industrial and Automotive  
Temperature Ranges  
Self-Timed Write Cycle with Auto-Clear  
DESCRIPTION  
4-byte page write buffer. The device operates via a 2-  
wire serial interface and is available in 8-pin DIP, 8-pin  
SOIC, 8-pin TSSOP or 8-pin MSOP.  
The CAT24C01B is a 1K-bit Serial CMOS EEPROM  
internallyorganizedas128wordsof8bitseach.Catalyst’s  
advanced CMOS technology substantially reduces de-  
vice power requirements. The CAT24C01B features a  
PIN CONFIGURATION  
BLOCK DIAGRAM  
SOIC Package (J)  
DIP Package (P)  
EXTERNAL LOAD  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
V
NC  
NC  
NC  
SENSE AMPS  
SHIFT REGISTERS  
CC  
NC  
NC  
NC  
V
CC  
TEST  
D
OUT  
TEST  
ACK  
SCL  
SCL  
V
V
CC  
V
SDA  
V
SS  
SS  
SDA  
WORD ADDRESS  
BUFFERS  
COLUMN  
DECODERS  
SS  
5020 FHD F01  
START/STOP  
SDA  
LOGIC  
MSOP Package (R)  
TSSOP Package (U)  
1
2
3
4
8
7
6
5
V
1
8
7
6
5
NC  
NC  
NC  
CC  
NC  
NC  
NC  
V
CC  
TEST  
XDEC  
EEPROM  
TEST  
SCL  
2
3
4
CONTROL  
LOGIC  
SCL  
V
SDA  
V
SS  
SS  
SDA  
DATA IN STORAGE  
PIN FUNCTIONS  
Pin Name  
Function  
No Connect  
HIGH VOLTAGE/  
TIMING CONTROL  
NC  
SDA  
SCL  
VCC  
VSS  
Serial Data/Address  
Serial Clock  
SCL  
STATE COUNTERS  
+1.8V to +6.0V Power Supply  
Ground  
TEST  
Test Input (GND, VCC or  
Floating)  
© 1999 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 25085-00 7/99 S-1  
1

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