E
CAT1320, CAT1321
Supervisory Circuits with I2C Serial 32K CMOS EEPROM
E TM
R
FEATURES
I 3.0V to 5.5V operation
I Precision power supply voltage monitor
I Low power CMOS technology
I 64-Byte page write buffer
I 1,000,000 Program/Erase cycles
I 100 year data retention
— 5V, 3.3V and 3V systems
- +5.0V (+/- 5%, +/- 10%)
- +3.3V (+/- 5%, +/- 10%)
- +3.0V (+/- 10%)
I Active low reset, CAT1320
I Active high reset, CAT1321
I Valid reset guaranteed at VCC=1V
I 400kHz I2C bus
I 8-pin DIP, SOIC, TSSOP and TDFN packages
I Industrial temperature range
DESCRIPTION
active, preventing the system microcontroller, ASIC or
peripherals from operating. Reset signals become inactive
typically 200 ms after the supply voltage exceeds the reset
threshold level. With both active high and low reset options,
interface to microcontrollers and other ICs is simple. In
addition, the RESET (CAT1320) pin can be used as an
input for push-button manual reset capability.
The CAT1320 and CAT1321 are complete memory and
supervisorysolutionsformicrocontroller-basedsystems.
A 32kbit serial EEPROM memory and a system power
supervisor with brown-out protection are integrated
together in low power CMOS technology. Memory
interface is via a 400kHz I2C bus.
The CAT1320 provides a precision VCC sense circuit
and drives an open drain output, RESET low whenever
VCC falls below the reset threshold voltage.
The CAT1320/21 memory features a 64-byte page. In
addition, hardware data protection is provided by a VCC
sense circuit that prevents writes to memory whenever VCC
falls below the reset threshold or until VCC reaches the reset
threshold during power up.
The CAT1321 provides a precision VCC sense circuit
thatdrivesanopendrainoutput, RESEThighwhenever
VCC falls below the reset threshold voltage.
Available packages include an 8-pin DIP, SOIC, TSSOP
and 4.9 x 3mm TDFN.
The power supply monitor and reset circuit protect
memory and system controllers during power up/down
and against brownout conditions. Five reset threshold
voltages support 5V, 3.3V and 3V systems. If power
supplyvoltagesareoutoftoleranceresetsignalsbecome
PIN CONFIGURATION
TDFN PACKAGE: 4.9MM X 3MM
(RD2, ZD2)
PDIP (P, L) SOIC (J, W)
TSSOP (U, Y)
1
2
3
4
8
7
6
5
A0
A1
A2
V
CC
8
7
6
5
8
7
6
5
1
2
3
4
1
2
3
4
A0
A1
A2
V
CC
RESET
A0
A1
A2
V
CC
RESET
RESET
SCL
CAT1320
CAT1320
CAT1321
CAT1320
SCL
SCL
V
V
SDA
SS
SDA
V
SDA
SS
SS
1
2
3
4
A0
8
7
6
5
V
CC
8
1
2
3
4
8
7
6
5
1
A0
V
A0
V
CC
CC
A1
A2
RESET
SCL
RESET
A1
A2
A1
A2
7
6
5
2
3
4
RESET
CAT1321
CAT1321
SCL
SDA
SCL
SDA
V
V
V
SS
SDA
SS
SS
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 20585, Rev. 00
1