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CACT2229DWRG4 PDF预览

CACT2229DWRG4

更新时间： 2024-10-29 21:03:59
品牌 Logo 应用领域
德州仪器 - TI 先进先出芯片光电二极管内存集成电路
页数 文件大小 规格书
18页 568K
描述
256X1 OTHER FIFO, 9ns, PDSO28, GREEN, PLASTIC, SOIC-28

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CACT2229DWRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP28,.4针数：28
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：5.56
最长访问时间：9 nsJESD-30 代码：R-PDSO-G28
JESD-609代码：e4长度：17.9 mm
内存密度：256 bit内存集成电路类型：OTHER FIFO
内存宽度：1湿度敏感等级：1
功能数量：1端子数量：28
字数：256 words字数代码：256
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：256X1
可输出：YES封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP28,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
并行/串行：SERIAL峰值回流温度（摄氏度）：260
电源：5 V认证状态：Not Qualified
座面最大高度：2.65 mm子类别：FIFOs
最大压摆率：0.0004 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.5 mmBase Number Matches：1

CACT2229DWRG4 数据手册

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SN74ACT2227, SN74ACT2229  
DUAL 64 × 1, DUAL 256 × 1  
FIRST-IN, FIRST-OUT MEMORIES  
SCAS220C – JUNE 1992 – REVISED OCTOBER 1997  
DW PACKAGE  
(TOP VIEW)  
Dual Independent FIFOs Organized as:  
64 Words by 1 Bit Each – SN74ACT2227  
256 Words by 1 Bit Each – SN74ACT2229  
1HF  
1AF/AE  
1WRTCLK  
1WRTEN  
1IR  
1OE  
1RDCLK  
1
28  
27  
Free-Running Read and Write Clocks Can  
Be Asynchronous or Coincident on Each  
FIFO  
2
3
26 1RDEN  
25 1OR  
24 1Q  
4
Input-Ready Flags Synchronized to Write  
Clocks  
5
6
23  
22  
21  
20  
19  
18  
17  
16  
15  
1D  
GND  
GND  
2RESET  
Output-Ready Flags Synchronized to Read  
Clocks  
7
V
V
CC  
CC  
8
9
1RESET  
2Q  
2D  
2IR  
2WRTEN  
2WRTCLK  
2AF/AE  
2HF  
Half-Full and Almost-Full/Almost-Empty  
Flags  
10  
11  
12  
13  
14  
2OR  
Support Clock Frequencies up to 60 MHz  
Access Times of 9 ns  
2RDEN  
2RDCLK  
2OE  
3-State Data Outputs  
Low-Power Advanced CMOS Technology  
Packaged in 28-Pin SOIC Package  
description  
The SN74ACT2227 and SN74ACT2229 are dual FIFOs suited for a wide range of serial-data buffering  
applicationsincluding elastic stores for frequencies up to OC-1 telecommunication rates. Each FIFO on the chip  
is arranged as 64 × 1 (SN74ACT2227) or 256 × 1 (SN74ACT2229) and has control signals and status flags for  
independent operation. Output flags for each FIFO include input ready (1IR or 2IR), output ready (1OR or 2OR),  
half full (1HF or 2HF), and almost full/almost empty (1AF/AE or 2AF/AE).  
Serial data is written into a FIFO on the low-to-high transition of the write-clock (1WRTCLK or 2WRTCLK) input  
when the write-enable (1WRTEN or 2WRTEN) input and input-ready flag (1IR or 2IR) output are both high.  
Serial data is read from a FIFO on the low-to-high transition of the read-clock (1RDCLK or 2RDCLK) input when  
the read-enable (1RDEN or 2RDEN) input and output-ready flag (1OR or 2OR) output are both high. The read  
and write clocks of a FIFO can be asynchronous to one another. A FIFO data output (1Q or 2Q) is in the  
high-impedance state when its output-enable (1OE or 2OE) input is low.  
Each input-ready flag (1IR or 2IR) is synchronized by two flip-flop stages to its write clock (1WRTCLK or  
2WRTCLK), and each output-ready flag (1OR or 2OR) is synchronized by three flip-flop stages to its read clock  
(1RDCLK or 2RDCLK). This multistage synchronization ensures reliable flag-output states when data is written  
and read asynchronously.  
A half-full flag (1HF or 2HF) is high when the number of bits stored in its FIFO is greater than or equal to half  
the depth of the FIFO. An almost-full/almost-empty flag (1AF/AE or 2AF/AE) is high when eight or fewer bits  
are stored in its FIFO and when eight or fewer empty locations are left in the FIFO. A bit present on the data  
output is not stored in the FIFO.  
The SN74ACT2227 and SN74ACT2229 are characterized for operation from –40°C to 85°C.  
For more information on this device family, see the application report FIFOs With a Word Width of One Bit  
(literature number SCAA006).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...18

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CACT2229DWRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ACT2229DWR TI

完全替代

 256 x 1 x 2 dual independent synchronous FIFO memories 28-SOIC -40 to 85
SN74ACT2229DW TI

完全替代

 DUAL 64 】 1, DUAL 256 】 1 FIRST-IN, FIRST-OUT

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