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CA3224 PDF预览

CA3224

更新时间: 2024-11-10 22:38:47
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
6页 65K
描述
Automatic Picture Tube Bias Control Circuit

CA3224 数据手册

 浏览型号CA3224的Datasheet PDF文件第2页浏览型号CA3224的Datasheet PDF文件第3页浏览型号CA3224的Datasheet PDF文件第4页浏览型号CA3224的Datasheet PDF文件第5页浏览型号CA3224的Datasheet PDF文件第6页 
CA3224E  
Automatic Picture Tube Bias Control Circuit  
November 1996  
Features  
Description  
• Automatic Picture Tube Bias Cutoff Control  
• Automatic Background Color Balance  
• Eliminates Grey Scale Adjustments  
• Compensates for Cathode-to-Heater Leakage  
• Electrostatic Protection on All Pins  
• Servo Loop Design  
The CA3224E is an automatic picture tube bias control cir-  
cuit used in color TV receiver CRT drive circuits. It is used to  
provide dynamic bias control of the grey scale both initially  
and over the CRT operating life, compensating for CRT cut-  
off changes.  
The CA3224E provides automatic continuous control of the  
cutoff current in each gun of a three-gun color CRT. From an  
input pulse amplitude proportional to the difference between  
the desired and the actual CRT cutoff, a gated sample/hold  
circuit generates a DC correction voltage which correctly  
biases the CRT driver circuit. The sample/hold bias correc-  
tion takes place each frame following the vertical blanking.  
Figure 1 shows a block diagram of the CA3224E. The func-  
tions include three identical servo loop transconductance  
• Wide Dynamic Range  
• Three-Gun Control  
• Minimal External Components  
Ordering Information  
amplifiers with a sample/hold switch and buffer amplifier plus  
control logic, internal bias and a mode switch.  
TEMP.  
o
PKG.  
NO.  
PART NUMBER RANGE ( C)  
PACKAGE  
22 Ld PDIP  
CA3224E  
-40 to 85  
E22.4  
Pinout  
CA3224E  
(PDIP)  
TOP VIEW  
GROUND  
CHANNEL 1 INPUT  
V
CC  
1
2
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
CHANNEL 1 HOLD CAP  
CHANNEL 1 OUTPUT  
CHANNEL 2 HOLD CAP  
CHANNEL 2 OUTPUT  
CHANNEL 3 HOLD CAP  
CHANNEL 3 OUTPUT  
CHANNEL 1 FREQ COMPENSATION  
CHANNEL 2 INPUT  
3
4
CHANNEL 2 FREQ COMPENSATION  
CHANNEL 3 INPUT  
5
6
CHANNEL 3 FREQ COMPENSATION  
VERTICAL INPUT  
7
V
BYPASS  
8
REF  
AUTO BIAS LEVEL ADJUST  
GROUND  
9
HORIZONTAL INPUT  
10  
11  
AUTO BIAS PULSE OUTPUT  
PROGRAM PULSE OUTPUT  
GRID PULSE OUTPUT  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 1553.1  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
8-56  

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