●Transmit-only mode
・After power is on, the BR24C21/F/FJ/FV is in Transmit-Only Mode. In this mode data can be output by providing the
clock to the VCLK pin.
・When the power is on, the SCL pin needs to be set to VCC(High level).
・SDA is at high-impedance during input of the first 9 clocks. At the 10th rising clock edge of VCLK data is output. After
power on, the output data is as follows:
00h address data → 01h address data → 02h address data → …
The address is incremented by one, after every 9 clocks of VCLK. All addresses are output in this mode.
When the counter reaches the last address, the next output data is 00h address data. (See Fig. 6)
・In this mode, the NULL bit (High data) is output between the address data and the next address data. (See Fig. 7)
・The read operation is in Transmit-Only Mode and can be started after the power is stabilized.
tVHIGH tVLOW
Vcc
SCL
VCLK
tVPD
9
1
10
SDA
D1
D0
D7
D6
VCLK
SDA
tVPU
ADDRESS
DATA
n
NULL BIT
DATA=1
ADDRESS n+1
DATA
D7
D6
D5
D4
D3
00h ADDRESS DATA
Fig.7 Null Bit
Fig.6 Transmit Only Mode
●Bi-directional mode
○Bi-directional Mode and Recovery Function
・The BR24C21/F/FJ/FV can be switched from Transmit-Only Mode to Bi-directional Mode by providing a valid High to
Low transition at the SCL pin, while the state of SDA is at high-impedance.
・After a valid high to low transition on the SCL pin, the BR24C21/F/FJ/FV begins to count the VCLK clock. If the VCLK
counter reaches 128 clocks without the command for Bi-directional Mode, the device reverts to Transmit-Only Mode
(Recovery function). The VCLK counter is reset by providing a valid high to low transition at the SCL pin. After reversal
to Transmit-Only Mode the device begins to output data (00h address data) with the 129th rising clock edge of VCLK.
・If the BR24C21/F/FJ/FV is switched from Transmit-Only Mode and receives the command for Bi-directional
Mode and responds with an Acknowledge, it is impossible to revert to Transmit-Only Mode. (Power down is the only
way to revert to Transmit-Only Mode.) Unless the input device code is “1010”, the device does not respond with an
Acknowledge. If the VCLK counter reaches 128 clocks afterwards, it is possible to revert to Transmit-Only Mode for
Recovery function. If the Master generates a STOP condition during the Slave address, before an Acknowledge is
input, it is possible to revert to Transmit-Only Mode.
・When the device is switched from Transmit-Only Mode to Bi-direction Mode, the period of tVHZ needs to be held.
B i - d i r e c t i o n a l
Bi-directional
B i - d i r e c t i o n a l
Transmit-oOnly
Bi-directional
Bi-directional
B i - d i r e c t i o n a l
p a r m a n e n t l y
parmanently
T r a n s m i t - o n l y
T r a nTr
s
an
m
smit
i
-
t
O
-
nl
O
y
n l y
T r a n s m i t - o n l y
Transmit-only
T r a n s i t i o n M o d e w i t h p o s s i b i l i t y
T r a n s i t i o n M o d e w i t h p o s s i b i l i t y
Transition Mode with possibility to
Transition Mode with possibility to
MODE
MODE
t o r e t u n e t o T r a n s m i t - O n l y M o d e
t o r e t u n e t o T r a n s m i t - O n l y M o d e
return to Transmit-Only Mode
return to Transmit-Only Mode
n<128
n
127 128 129
1
2
3
4
1
2
VCLK
SCL
SDA
VCLK
SCL
SDA
A D D R E S S 0 0 h
ADDRESS 00h
tVHZ
tVHZ
D7 D6 D5 D4
S
1
0
1
0
*
*
*
R/W ACK
*Don’t care
Fig.8 Recovery Mode
Fig.9 Mode Change
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