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BU7252G-TR PDF预览

BU7252G-TR

更新时间: 2024-02-04 09:38:17
品牌 Logo 应用领域
罗姆 - ROHM 比较器
页数 文件大小 规格书
17页 455K
描述
Low Voltage CMOS Comparator

BU7252G-TR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:MSOP
包装说明:VSSOP, TSSOP8,.16针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:9 weeks
风险等级:5.25Is Samacsys:N
放大器类型:COMPARATOR最大输入失调电压:11000 µV
JESD-30 代码:R-PDSO-G8长度:2.9 mm
负供电电压上限:标称负供电电压 (Vsup):
功能数量:2端子数量:8
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:VSSOP
封装等效代码:TSSOP8,.16封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3 V认证状态:Not Qualified
标称响应时间:50 ns座面最大高度:0.9 mm
子类别:Comparator最大压摆率:0.08 mA
供电电压上限:7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:2.8 mm
Base Number Matches:1

BU7252G-TR 数据手册

 浏览型号BU7252G-TR的Datasheet PDF文件第11页浏览型号BU7252G-TR的Datasheet PDF文件第12页浏览型号BU7252G-TR的Datasheet PDF文件第13页浏览型号BU7252G-TR的Datasheet PDF文件第14页浏览型号BU7252G-TR的Datasheet PDF文件第16页浏览型号BU7252G-TR的Datasheet PDF文件第17页 
Cautions on use  
1) Absolute maximum ratings  
Absolute maximum ratings are the values which indicate the limits,  
within which the given voltage range can be safely charged to the terminal.  
However, it does not guarantee the circuit operation.  
2) Applied voltage to the input terminal  
For normal circuit operation of voltage comparator, please input voltage for its  
input terminal within input common mode voltage VDD+0.3[V].  
Then, regardless of power supply voltage,VSS-0.3[V] can be applied to input  
terminals without deterioration or destruction of its characteristics.  
3) Operating power supply (split power supply/single power supply)  
The voltage comparator operates if a given level of voltage is applied between VDD and  
VSS. Therefore, the operational amplifier can be operated under single power supply  
or split power supply.  
4) Power dissipation (pd)  
If the IC is used under excessive power dissipation. An increase in the chip temperature will cause  
deterioration of the radical characteristics of IC.  
For example, reduction of current capability. Take consideration of the effective power dissipation and  
thermal design with a sufficient margin. Pd is reference to the provided power dissipation curve.  
5) Short circuits between pins and incorrect mounting  
Short circuits between pins and incorrect mounting when mounting the IC on a printed circuits board,  
take notice of the direction and positioning of the IC.  
If IC is mounted erroneously, It may be damaged. Also, when a foreign object is inserted between  
output, between output and VDD terminal or VSS terminal which causes short circuit, the IC may be  
damaged.  
6) Using under strong electromagnetic field  
Be careful when using the IC under strong electromagnetic field because it may malfunction.  
7) Usage of IC  
When stress is applied to the IC through warp of the printed circuit board,  
The characteristics may fluctuate due to the piezo effect.  
Be careful of the warp of the printed circuit board.  
8) Testing IC on the set board  
When testing IC on the set board, in cases where the capacitor is connected to the low impedance,  
make sure to discharge per fabrication because there is a possibility that IC may be damaged by stress.  
When removing IC from the set board, it is essential to cut supply voltage.  
As a countermeasure against the static electricity, observe proper grounding during fabrication process  
and take due care when carrying and storage it.  
9) The IC destruction caused by capacitive load  
The transistors in circuits may be damaged when VDD terminal and VSS terminal is shorted with the charged  
output terminal capacitor.When IC is used as a operational amplifier or as an application circuit,  
where oscillation is not activated by an output capacitor,the output capacitor must be kept below  
0.1[μF] in order to prevent the damage mentioned above.  
10) Decupling capacitor  
Insert the deculing capacitance between VDD and VSS, for stable operation of operational amplifier.  
11) Latch up  
Be careful of input vltage that exceed the VDD and VSS. When CMOS device have sometimes occur  
latch up operation. And protect the IC from abnormaly noise  
15/16  

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