Ultra Low Power/Voltage CMOS SRAM
1M x 16 or 2M x 8 bit switchable
BSI
BS616UV1620
DESCRIPTION
FEATURES
The BS616UV1620 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 1,048,676 words by 16 bits or
2,097,152 bytes by 8 bits selectable by CIO pin and operates in a wide
range of 1.8V to 2.3V supply voltage.
• Ultra low operation voltage : 1.8 ~ 2.3V
• Ultra low power consumption :
Vcc = 1.8V C-grade : 25mA (Max.) operating current
I- grade : 30mA (Max.) operating current
1.2uA (Typ.) CMOS standby current
• High speed access time :
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 1.2uA and maximum access time of 70/100ns in 2.0V operation.
This device provide three control inputs and three states output drivers
for easy memory expansion.
-70
70ns (Max.) at Vcc = 2.0V
-10 100ns (Max.) at Vcc = 2.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
The BS616UV1620 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616UV1620 is available in DICE form and 48-pin BGA type.
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE1, CE2 and OE options
• I/O Configuration x8/x16 selectable by CIO, LB and UB pin
PRODUCT FAMILY
POWER DISSIPATION
SPEED
(ns)
STANDBY
Operating
PRODUCT
FAMILY
OPERATING
(ICCSB1, Max)
(ICC, Max)
Vcc RANGE
PKG TYPE
TEMPERATURE
Vcc=2.0V
70 / 100
70 / 100
Vcc=2.0V
30uA
Vcc=2.0V
25mA
BS616UV1620BC
BS616UV1620FC
BS616UV1620BI
BS616UV1620FI
BGA-48-0810
BGA-48-0912
BGA-48-0810
BGA-48-0912
+0 O C to +70O
-40 O C to +85O
C
C
1.8V ~ 2.3V
1.8V ~ 2.3V
40uA
30mA
BLOCK DIAGRAM
PIN CONFIGURATIONS
A19
A15
A14
A13
1
2
3
4
5
6
A12
A11
A10
A9
Address
Input
A0
A1
A2
24
A
B
C
D
E
F
CE2
4096
LB
OE
Row
Memory Array
4096 x 4096
Buffer
A8
Decoder
D8
D9
UB
A3
A5
A4
A6
CE1
D1
D0
D2
A17
A7
A6
D10
4096
Data
16(8)
16(8)
Column I/O
Input
D0
Buffer
.
.
.
.
VSS
D11
A17
A19
A14
A12
A9
A7
D3
D4
VCC
VSS
.
.
.
.
Write Driver
Sense Amp
16(8)
16(8)
256(512)
Data
VCC D12
A16
Output
Buffer
Column Decoder
D15
D5
D6
D7
D14
D15
A18
D13
CI.O
A8
A15
A13
A10
CE1
CE2
WE
OE
UB
16(18)
Control
Address Input Buffer
G
H
WE
LB
CIO
A16 A0 A1 A2 A3
A5
A18(SAE)
A4
A11 SAE.
Vdd
Vss
48-Ball CSP top View
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
Revision 2.2
April 2001
R0201-BS616UV1620
1