bq4285
(
)
Real-Time Clock RTC With NVRAM Control
➤ Calendar in day of the week, day of
General Description
the month, months, and years, with
Features
➤ Direct clock/calendar replace-
ment for IBM® AT-compatible
computers and other applications
automatic leap-year adjustment
The CMOS bq4285 is a low-power
microprocessor peripheral providing
a time-of-day clock and 100-year cal-
endar with alarm features and bat-
tery operation. Other features include
three maskable interrupt sources,
square wave output, and 114 bytes of
general nonvolatile storage.
➤ Time of day in seconds, minutes,
and hours
➤ Functionally compatible with the
- 12- or 24-hour format
DS1285
- Optional daylight saving
- Closely matches MC146818A
adjustment
pin configuration
➤ BCD or binary format for clock
The bq4285 write-protects the clock,
calendar, and storage registers dur-
ing power failure. A backup battery
then maintains data and operates
the clock and calendar.
➤ 114 bytes of general nonvolatile
and calendar data
storage
➤ Programmable square wave out-
➤ Automatic backup and write-
put
protect control to external SRAM
➤ Three individually maskable in-
➤ 160 ns cycle time allows fast bus
The bq4285 is a fully compatible real-
time clock for IBM AT-compatible com-
puters and other applications. The only
external components are a 32.768kHz
crystal and a backup battery.
terrupt event flags:
operation
- Periodic rates from 122 µs to
➤ Selectable Intel or Motorola bus
timing (PLCC), Intel bus timing
(DIP and SOIC)
500 ms
- Time-of-day alarm once per
The bq4285 integrates a battery-
backup controller to make a standard
CMOS SRAM nonvolatile during
power-fail conditions. During power-
fail, the bq4285 automatically write-
protects the external SRAM and pro-
vides a VCC output sourced from the
clock backup battery.
second to once per day
➤ Less than 0.5 µA load under bat-
tery operation
- End-of-clock update cycle
➤ 24-pin plastic DIP or SOIC
➤ 14 bytes for clock/calendar and
control
Pin Connections
Pin Names
AD0–AD7
Multiplexed address/data
input/output
MOT
Bus type select input
(PLCC only )
CS
Chip select input
V
24
1
V
CC
OUT
X
1
23
22
2
3
SQW
CE
AS
DS
R/W
Address strobe input
Data strobe input
Read/write input
X
2
OUT
4
CE
AD
0
21
20
19
18
17
16
15
14
13
IN
5
6
AD
AD
25
24
CE
BC
0
1
IN
5
BC
AD
1
AD
2
AD
3
AD
4
AD
5
AD
6
INT
Interrupt request output
Reset input
6
INT
RST
DS
V
SS
R/W
7
8
9
10
11
AD
AD
AD
AD
23
22
21
20
19
INT
RST
DS
2
3
4
5
RST
7
SQW
BC
X1–X2
Square wave output
3V backup cell input
Crystal inputs
8
9
V
SS
NC
R/W
10
11
12
AS
CS
AD
7
NC
No connect
V
SS
CEIN
CEOUT
VOUT
VCC
RAM chip enable input
RAM chip enable output
Supply output
28-Pin PLCC
24-Pin DIP or SOIC
PN428501.eps
PN428502.eps
+5V supply
VSS
Ground
Jan. 1999 D
1