BQ25303J
SLUSDT8 – FEBRUARY 2021
www.ti.com
7 Pin Configuration and Functions
VBUS
REGN
STAT
ICHG
1
2
3
4
12
11
10
9
GND
GND
BAT
Thermal
Pad
VSET
5
6
7
8
(Not to scale)
Figure 7-1. RTE Package 16-Pin WQFN Top View
Table 7-1. Pin Functions
PIN
I/O(1)
DESCRIPTION
NAME
NO.
Charger input voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between
VBUS and PMID with VBUS on source. Place a 2.2uF ceramic capacitor from VBUS to GND and place it
as close as possible to IC.
VBUS
1
P
Connected to the drain of the reverse blocking MOSFET (RBFET) and the drain of high-side MOSFET
(HSFET). Place ceramic 10μF on PMID to GND and place it as close as possible to IC.
PMID
SW
16
13,14
15
P
P
Switching node. Connected to output inductor. Internally SW is connected to the source of the n-channel
HSFET and the drain of the n-channel LSFET. Connect the 0.047μF bootstrap capacitor from SW to BTST.
High-side FET driver supply. Internally, the BTST is connected to the cathode of the internal boost-strap
diode. Connect the 0.047μF bootstrap capacitor from SW to BTST.
BTST
GND
REGN
BAT
P
Ground. Connected directly to thermal pad on the top layer. A single point connection is recommended
between power ground and analog ground near the IC GND pins.
11,12
2
P
Low-side FET driver positive supply output. Connect a 2.2μF ceramic capacitor from REGN to GND. The
capacitor should be placed close to the IC.
P
Battery voltage sensing input. Connect this pin to the positive terminal of the battery pack and the node of
inductor output terminal. 10-µF capacitor is recommended to connect to this pin.
10
AI
Battery temperature voltage input. Connect a negative temperature coefficient thermistor (NTC). Program
temperature window with a resistor divider from REGN to TS and TS to GND. Charge suspends when TS
pin voltage is out of range. When TS pin is not used, connect a 10-kΩ resistor from REGN to TS and a 10-
kΩ resistor from TS to GND. It is recommended to use a 103AT-2 thermistor.
TS
7
4
AI
AI
Charge current program input. Connect a 1% resistor RICHG from this pin to ground to program the
charge current as ICHG = KICHG / RICHG (KICHG = 40,000). No capacitor is allowed to connect at this pin.
When ICHG pin is pulled to ground or left open, the charger stop switching and STAT pin starts blinking.
ICHG
Charge status indication output. This pin is open drain output. Connect this pin to REGN via a current
limiting resistor and LED. The STAT pin indicates charger status as:
•
•
•
Charge in progress: STAT pin is pulled LOW
Charge completed, charge disabled by EN: STAT pin is OPEN
Fault conditions: STAT pin blinks.
STAT
3
AO
Charge Voltage Setting Input. VSET pin sets battery charge voltage. Program battery regulation voltage
with a resistor pull-down from VSET to GND:
•
•
•
•
Floating (R > 200kΩ±10%): 4.1V
Shorted to GND (R < 510Ω): 4.2V
R = 51kΩ ± 10%: 4.35V
VSET
POL
9
5
AI
AI
R = 10kΩ ± 10%: 4.4V
The maximum allowed capacitance on this pin is 50pF.
EN pin polarity selection.
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