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BQ20Z75-V180 PDF预览

BQ20Z75-V180

更新时间: 2024-10-28 08:58:59
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
48页 1314K
描述
12-Bit, 1-GSPS Analog-to-Digital Converter

BQ20Z75-V180 数据手册

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ADS5400  
www.ti.com  
SLAS611B OCT 2009REVISED MARCH 2010  
12-Bit, 1-GSPS Analog-to-Digital Converter  
Check for Samples: ADS5400  
1
FEATURES  
On-Chip Analog Buffer  
23  
1-GSPS Sample Rate  
100-Pin TQFP PowerPAD™ Package  
(16-mm × 16-mm Footprint With Leads)  
12-Bit Resolution  
Industrial Temperature Range = –40°C to 85°C  
2.1 GHz Input Bandwidth  
SFDR = 66 dBc at 1.2 GHz  
SNR = 57.6 dBFS at 1.2 GHz  
7 Clock Cycle Latency  
APPLICATIONS  
Test and Measurement Instrumentation  
Ultra-Wide Band Software-Defined Radio  
Data Acquisition  
Power Amplifier Linearization  
Signal Intelligence and Jamming  
Radar  
Interleave Friendly: Internal Adjustments for  
Gain, Phase, and Offset  
1.5V to 2V Selectable Full-Scale Range  
LVDS-Compatible Outputs, 1 or 2 Bus Options  
Total Power Dissipation: 2.15 W  
DESCRIPTION  
The ADS5400 is a 12-bit, 1-GSPS analog-to-digital converter (ADC) that operates from both a 5-V supply and  
3.3-V supply, while providing LVDS-compatible digital outputs. The analog input buffer isolates the internal  
switching of the track and hold from disturbing the signal source. The simple 3-stage pipeline provides extremely  
low latency for time critical applications. Designed for the conversion of signals up to 2 GHz of input frequency at  
1 GSPS, the ADS5400 has outstanding low noise performance and spurious-free dynamic range over a large  
input frequency range.  
The ADS5400 is available in a TQFP-100 PowerPAD™ package. The combination of the PowerPAD package  
and moderate power consumption of the ADS5400 allows for operation without an external heatsink. The  
ADS5400 is built on Texas Instrument's complementary bipolar process (BiCom3) and is specified over the full  
industrial temperature range (–40°C to 85°C).  
BLOCK DIAGRAM  
ADS5400  
RESETP (SYNCINP)  
RESETN (SYNCINN)  
CLKINP  
CLKINN  
CLOCK  
DIVIDE  
INP  
INN  
12  
CLKOUTAP  
CLKOUTAN  
12-bit ADC  
(3 stage pipeline)  
BUFFER  
12  
OUTA[0-11]P  
OUTA[0-11]N  
BUS A  
VCM  
OVRAP (SYNCOUTAP)  
OVRAN (SYNCOUTAN)  
REFERENCE  
VREF  
OVER RANGE  
DETECTOR,  
SYNC and  
DEMUX  
SCLK  
SDIO  
GAIN ADJUST  
PHASE ADJUST  
OFFSET ADJUST  
TEMP SENSOR  
CLKOUTBP  
CLKOUTBN  
SDO  
12  
SDENB  
OUTB[0-11]P  
OUTB[0-11]N  
CONTROL  
BUS B  
ENEXTREF  
ENPWD  
ENA1BUS  
OVRBP (SYNCOUTBP)  
OVRBN (SYNCOUTBN)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
PowerPAD is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2010, Texas Instruments Incorporated  
 
 

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