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BAT54WS

更新时间： 2024-01-21 08:11:03
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英特矽尔 - INTERSIL /
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10页 531K
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ISL6844 Reference Design: ISL6844EVAL3Z

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BAT54WS 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：R-PDSO-G2针数：2
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8541.10.00.70风险等级：6.92
Is Samacsys：N配置：SINGLE
二极管元件材料：SILICON二极管类型：RECTIFIER DIODE
最大正向电压 (VF)：0.24 VJESD-30 代码：R-PDSO-G2
JESD-609代码：e3湿度敏感等级：1
最大非重复峰值正向电流：1 A元件数量：1
端子数量：2最高工作温度：150 °C
最低工作温度：-40 °C最大输出电流：0.3 A
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
认证状态：Not Qualified最大重复峰值反向电压：40 V
最大反向恢复时间：0.005 µs子类别：Rectifier Diodes
表面贴装：YES技术：SCHOTTKY
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子位置：DUAL处于峰值回流温度下的最长时间：30
Base Number Matches：1

BAT54WS 数据手册

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Application Note 1612  
ISL6844 Reference Design: ISL6844EVAL3Z  
Where:  
Introduction  
This document focuses on Intersil’s solution for the flyback  
converter. An inexpensive approach with discrete circuitry has  
been adopted instead of an integrated solution. Low cost and  
optimal performance are the prime objectives.  
η = Converter’s efficiency, assuming 75%  
P
F
= Total output power  
OUT  
= Switching frequency  
sw  
As a result, the peak magnitizing current = 1.06A  
The transformer’s turn ratio can be determined from:  
Intersil’s superior industry-standard ISL684x family of PWM  
controllers would best serve the needs of this design. Some  
key features of this family of parts include:  
(V  
+ V ) ⋅ (1 – d )  
F 2  
out  
V
-------------------------------------------------------  
n =  
• 40ns peak current sensing  
• 1A MOSFET driver  
⋅ d  
MAX  
(EQ. 2)  
IN, MIN  
d
+ d < 1  
2
MAX  
ISL6844 was selected for its large UVLO hysteresis, UVLO start  
threshold, and the fact that the converter has been designed  
for a maximum operational duty cycle of 50%, thus protecting  
the IC by limiting the duty cycle in case of extreme fault  
conditions.  
Where:  
n = Turns ratio between the primary and the secondary  
windings  
V = Forward drop across the diode, assuming 0.6V  
F
Specifications  
• Operating Input Voltage: 24V DC ±10%  
• Output Voltage: ±15V  
d = Duty cycle of diode conduction time  
2
d T is the magnitizing current reset time. Setting d to 0.5,  
2 sw  
2
Equation 2 yields the transformer’s turn ratio of 1.  
• Output Current: 100mA  
D1  
1
n
+15V  
VIN  
• Ripple: 50mV  
P-P  
CIN  
CS  
COUT1  
• Switching Frequency: 300kHz  
• Topology: DCM Flyback  
RS  
DS  
n
COUT2  
D2  
OUT  
CS  
-15V  
Design Procedure  
RSENSE  
VIN  
Figure 1 shows a simplified circuit of the solution. It is  
assumed that loads are balanced for both positive and  
negative outputs. The turn ratio of the auxiliary winding is  
chosen to be the same as the secondary winding. Figure 2  
shows typical operational waveforms of a flyback converter in  
discontinuous conduction mode.  
ISL6844  
VREG  
n
VDD  
FB  
CAUX  
GND  
Determine the Maximum Duty Cycle and  
Transformer Turn Ratio  
FIGURE 1. SIMPLIFIED CIRCUIT  
ISL6844 clamps the duty cycle to 50%. However, in this  
converter design, it is assumed that the operating maximum  
duty cycle, d  
21.6V.  
, will be 35% at the minimum input voltage of  
max  
Given the power level, the flyblack converter is designed to  
operate in discontinuous conduction mode. The magnitizing  
inductance can be calculated using Equation 1:  
2
2
max  
⋅ F  
sw  
V
⋅ d  
IN, MIN  
-----------------------------------------  
L
= η ⋅  
M
2 ⋅ P  
(EQ. 1)  
out  
2
2
21.6 ⋅ 0.35  
-------------------------------------  
2 ⋅ 3 ⋅ 300×10  
= 0.75 ⋅  
= 23.8μH  
3
November 28, 2011  
AN1612.1  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2010, 2011. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  
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