Features
• Core
– ARM® Cortex®-M3 revision 2.0 running at up to 84 MHz
– Memory Protection Unit (MPU)
– Thumb®-2 instruction set
– 24-bit SysTick Counter
– Nested Vector Interrupt Controller
• Memories
–
From 256 to 512 Kbytes embedded Flash, 128-bit wide access, memory accelerator, dual bank
– From 32 to 100 Kbytes embedded SRAM with dual banks
– 16 Kbytes ROM with embedded bootloader routines (UART, USB) and IAP routines
– Static Memory Controller (SMC): SRAM, NOR, NAND support. NAND Flash
controller with 4-kbyte RAM buffer and ECC
AT91SAM
ARM-based
Flash MCU
• System
– Embedded voltage regulator for single supply operation
– POR, BOD and Watchdog for safe reset
– Quartz or ceramic resonator oscillators: 3 to 20 MHz main and optional low power
32.768 kHz for RTC or device clock.
– High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz Default
Frequency for fast device startup
– Slow Clock Internal RC oscillator as permanent clock for device clock in low power
mode
– One PLL for device clock and one dedicated PLL for USB 2.0 High Speed Mini
Host/Device
– Temperature Sensor
SAM3X
SAM3A
Series
– Up to 17 peripheral DMA (PDC) channels and 6-channel central DMA plus
dedicated DMA for High-Speed USB Mini Host/Device and Ethernet MAC
• Low Power Modes
– Sleep and Backup modes, down to 2.5 µA in Backup mode.
– Backup domain: VDDBU pin, RTC, eight 32-bit backup registers
– Ultra Low-power RTC
Summary
• Peripherals
– USB 2.0 Device/Mini Host: 480 Mbps, 4-kbyte FIFO, up to 10 bidirectional
Endpoints, dedicated DMA
– Up to 4 USARTs (ISO7816, IrDA®, Flow Control, SPI, Manchester and LIN support)
and one UART
– 2 TWI (I2C compatible), up to 6 SPIs, 1 SSC (I2S), 1 HSMCI (SDIO/SD/MMC) with up
to 2 slots
– 9-Channel 32-bit Timer/Counter (TC) for capture, compare and PWM mode,
Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor
– Up to 8-channel 16-bit PWM (PWMC) with Complementary Output, Fault Input, 12-
bit Dead Time Generator Counter for Motor Control
– 32-bit Real Time Timer (RTT) and RTC with calendar and alarm features
– 16-channel 12-bit 1Msps ADC with differential input mode and programmable gain
stage
– One 2-channel 12-bit 1 Msps DAC
– One Ethernet MAC 10/100 (EMAC) with dedicated DMA
– Two CAN Controller with eight Mailboxes
– One True Random Number Generator (TRNG)
– Write Protected Registers
• I/O
– Up to 103 I/O lines with external interrupt capability (edge or level sensitivity),
debouncing, glitch filtering and on-die Series Resistor Termination
– Up to Six 32-bit Parallel Input/Outputs (PIO)
• Packages
– 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm
– 100-ball LFBGA, 9 x 9 mm, pitch 0.8 mm
– 144-lead LQFP, 20 x 20 mm, pitch 0.5 mm
– 144-ball LFBGA, 10 x 10 mm, pitch 0.8 mm
11057BS–ATARM–13-Jul-12