Table 3-2.
Module
ATR0621P1 Signal Description (Continued)
Name
SIGHI0
Function
Type
Input
Active Level Comment
Digital IF
–
–
Interface to ATR0601
SIGLO0
Digital IF
Input
Interface to ATR0601
GPS
SIGHI1
Digital IF
Input
–
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
SIGLO1
Digital IF
Input
–
TIMEPULSE
GPSMODE0-12
STATUSLED
NEEPROM
ANTON
GPS synchronized time pulse
GPS mode
Output
Input
–
–
Status LED
Output
Input
–
Enable EEPROM support
Active antenna power on output
Low
–
CONFIG
Output
Active antenna short circuit
detection Input
NANTSHORT
Input
Low
PIO-controlled after reset
NAADET0-1
TMS
Active antenna detection input
Test mode select
Test data in
Input
Input
Input
Output
Input
Input
Input
Low
–
PIO-controlled after reset
Internal pull-up resistor
Internal pull-up resistor
Output high in RESET state
Internal pull-up resistor
Internal pull-down resistor
Internal pull-down resistor
TDI
–
TDO
Test data out
–
JTAG/ICE
TCK
Test clock
–
NTRST
DBG_EN
Test reset input
Debug enable
Low
High
Interface to ATR0601, Schmitt
trigger input
CLK23
MCLK_OUT
NRESET
Clock input
Input
Output
I/O
–
–
CLOCK
RESET
Master clock output
Reset input
PIO-controlled after reset
Open drain with internal pull-up
resistor
Low
VDD18
VDDIO
Power
Power
–
–
Core voltage 1.8V
Variable I/O voltage 1.65V to 3.6V
POWER
USB voltage 0 to 2.0V or
3.0Vto 3.6V(1)
VDD_USB
Power
–
GND
LDOBAT_IN
VBAT
Power
Power
Power
Out
–
–
–
–
–
Ground
2.3V to 3.6V
1.5V to 3.6V
1.8V backup voltage
2.3V to 3.6V
LDOBAT
LDO18
VBAT18
LDO_IN
LDO in
Power
1.8V core voltage, maximum
80 mA
LDO_OUT
LDO out
Power
–
LDO_EN
LDO enable
Input
–
Note:
1. The USB transceiver is disabled if VDD_USB < 2.0V. In this case the pins USB_DM and USB_DP are connected to GND
(internal pull-down resistors). The USB transceiver is enabled if VDD_USB is within 3.0V and 3.6V.
10
ATR0621P1
4975BS–GPS–05/08