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ATMEGA16U4_10 PDF预览

ATMEGA16U4_10

更新时间: 2024-11-10 06:38:35
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器
页数 文件大小 规格书
26页 686K
描述
8-bit Microcontroller with 16/32K Bytes of ISP Flash and USB Controller

ATMEGA16U4_10 数据手册

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Features  
High Performance, Low Power AVR® 8-Bit Microcontroller  
Advanced RISC Architecture  
– 135 Powerful Instructions – Most Single Clock Cycle Execution  
– 32 x 8 General Purpose Working Registers  
– Fully Static Operation  
– Up to 16 MIPS Throughput at 16 MHz  
– On-Chip 2-cycle Multiplier  
Non-volatile Program and Data Memories  
8-bit  
Microcontroller  
with  
16/32K Bytes of  
ISP Flash  
and USB  
– 16/32K Bytes of In-System Self-Programmable Flash (ATmega16U4/ATmega32U4)  
– 1.25/2.5K Bytes Internal SRAM (ATmega16U4/ATmega32U4)  
– 512Bytes/1K Bytes Internal EEPROM (ATmega16U4/ATmega32U4)  
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM  
– Data retention: 20 years at 85°C/ 100 years at 25°C(1)  
– Optional Boot Code Section with Independent Lock Bits  
In-System Programming by On-chip Boot Program  
True Read-While-Write Operation  
All supplied parts are preprogramed with a default USB bootloader  
– Programming Lock for Software Security  
JTAG (IEEE std. 1149.1 compliant) Interface  
Controller  
– Boundary-scan Capabilities According to the JTAG Standard  
– Extensive On-chip Debug Support  
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface  
USB 2.0 Full-speed/Low Speed Device Module with Interrupt on Transfer Completion  
– Complies fully with Universal Serial Bus Specification Rev 2.0  
– Supports data transfer rates up to 12 Mbit/s and 1.5 Mbit/s  
– Endpoint 0 for Control Transfers: up to 64-bytes  
– 6 Programmable Endpoints with IN or Out Directions and with Bulk, Interrupt or  
Isochronous Transfers  
ATmega16U4  
ATmega32U4  
– Configurable Endpoints size up to 256 bytes in double bank mode  
– Fully independent 832 bytes USB DPRAM for endpoint memory allocation  
– Suspend/Resume Interrupts  
Preliminary  
Summary  
– CPU Reset possible on USB Bus Reset detection  
– 48 MHz from PLL for Full-speed Bus Operation  
– USB Bus Connection/Disconnection on Microcontroller Request  
– Crystal-less operation for Low Speed mode  
Peripheral Features  
– On-chip PLL for USB and High Speed Timer: 32 up to 96 MHz operation  
– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode  
– Two 16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode  
– One 10-bit High-Speed Timer/Counter with PLL (64 MHz) and Compare Mode  
– Four 8-bit PWM Channels  
– Four PWM Channels with Programmable Resolution from 2 to 16 Bits  
– Six PWM Channels for High Speed Operation, with Programmable Resolution from  
2 to 11 Bits  
– Output Compare Modulator  
– 12-channels, 10-bit ADC (features Differential Channels with Programmable Gain)  
– Programmable Serial USART with Hardware Flow Control  
– Master/Slave SPI Serial Interface  
7766ES–AVR–04/10  

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