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ATF22V10BQL-20NM/883 PDF预览

ATF22V10BQL-20NM/883

更新时间: 2024-11-30 06:38:35
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑输入元件时钟
页数 文件大小 规格书
15页 537K
描述
Highperformance EE PLD

ATF22V10BQL-20NM/883 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:QCCN, LCC28,.45SQ
针数:28Reach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.06架构:PAL-TYPE
最大时钟频率:38.5 MHzJESD-30 代码:S-CQCC-N28
JESD-609代码:e0长度:11.45 mm
专用输入次数:11I/O 线路数量:10
输入次数:22输出次数:10
产品条款数:132端子数量:28
最高工作温度:125 °C最低工作温度:-55 °C
组织:11 DEDICATED INPUTS, 10 I/O输出函数:MACROCELL
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装等效代码:LCC28,.45SQ封装形状:SQUARE
封装形式:CHIP CARRIER电源:5 V
可编程逻辑类型:FLASH PLD传播延迟:20 ns
认证状态:Not Qualified筛选级别:MIL-STD-883
座面最大高度:2.54 mm子类别:Programmable Logic Devices
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
宽度:11.45 mmBase Number Matches:1

ATF22V10BQL-20NM/883 数据手册

 浏览型号ATF22V10BQL-20NM/883的Datasheet PDF文件第2页浏览型号ATF22V10BQL-20NM/883的Datasheet PDF文件第3页浏览型号ATF22V10BQL-20NM/883的Datasheet PDF文件第4页浏览型号ATF22V10BQL-20NM/883的Datasheet PDF文件第5页浏览型号ATF22V10BQL-20NM/883的Datasheet PDF文件第6页浏览型号ATF22V10BQL-20NM/883的Datasheet PDF文件第7页 
Features  
Industry Standard Architecture  
– Low-cost Easy-to-use Software Tools  
High-speed, Electrically-erasable Programmable Logic Devices  
– 7.5 ns Maximum Pin-to-pin Delay  
Several Power Saving Options  
Device  
ICC, Standby  
85 mA  
ICC, Active  
90 mA  
ATF22V10B  
ATF22V10BQ(1)  
ATF22V10BQL(2)  
35 mA  
40 mA  
High-  
5 mA  
20 mA  
performance  
EE PLD  
Notes: 1. The shaded devices are obsolete. Suggested replacement: ATF22V10CQ  
2. The shaded devices are obsolete. Suggested replacement: ATF22V10CQZ  
CMOS and TTL Compatible Inputs and Outputs  
– Input and I/O Pull-up Resistors  
Advanced Flash Technology  
– Reprogrammable  
ATF22V10B  
– 100% Tested  
High-reliability CMOS Process  
– 20-year Data Retention  
– 100 Erase/Write Cycles  
– 2,000V ESD Protection  
– 200 mA Latchup Immunity  
Full Military, Commercial, and Industrial Temperature Ranges  
Dual-in-line and Surface Mount Packages in Standard Pinouts  
PCI Compliant  
Logic Diagram  
TSSOP  
CLK/IN  
IN  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
VCC  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
IN  
2
IN  
3
IN  
4
Pin Configurations  
All Pinouts Top View  
IN  
5
IN  
6
IN  
7
IN  
8
IN  
9
Pin Name Function  
IN  
10  
11  
12  
IN  
CLK  
IN  
Clock  
GND  
Logic Inputs  
DIP/SOIC  
LCC/PLCC  
I/O  
*
Bidirectional Buffers  
No Internal Connection  
+5V Supply  
CLK/IN  
IN  
1
2
3
4
5
6
7
8
9
24 VCC  
23 I/O  
22 I/O  
21 I/O  
20 I/O  
19 I/O  
18 I/O  
17 I/O  
16 I/O  
15 I/O  
14 I/O  
13 IN  
IN  
IN  
IN  
IN  
*
5
6
7
8
9
25 I/O  
24 I/O  
23 I/O  
IN  
IN  
VCC  
IN  
22  
*
IN  
IN  
21 I/O  
20 I/O  
19 I/O  
IN  
IN 10  
IN 11  
IN  
IN 10  
IN 11  
Rev. 0250L–PLD–06/03  
GND 12  

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