Datasheet > ATF22V10C

ATF22V10C

更新时间： 2024-11-29 22:50:19

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程逻辑器件
页数	文件大小	规格书
8页	237K
描述
High Performance E2 PLD

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中文翻译

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数据手册

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ATF22V10C 数据手册

Features

Industry Standard Architecture

•

Low Cost Easy-to-Use Software Tools

High Speed Electrically Erasable Programmable Logic Devices

•

5 ns Maximum Pin-to-Pin Delay

CMOS and TTL Compatible Inputs and Outputs

•

Latch Feature Holds Inputs to Previous Logic States

Advanced Flash Technology

•

Reprogrammable

100% Tested

High

Performance

E²PLD

High Reliability CMOS Process

•

20 Year Data Retention

100 Erase/Write Cycles

2,000V ESD Protection

200 mA Latchup Immunity

Dual-in-Line and Surface Mount Packages in Standard Pinouts

•

ATF22V10C

Logic Diagram

Pin Configurations

Pin Name

Function

TSSOP Top View

CLK

Clock

Logic Inputs

CLK/IN

VCC

I/O

Bidirectional Buffers

No Internal Connection

+5V Supply

IN/PD

VCC

Power Down

ATF22V10C

GND

PLCC

DIP/SOIC

Top view

Note:

For PLCC, pins 1, 8, 15 and 22 can be left uncon-

nected. For superior performance, connect V_CC

to pin 1 and ground to 8, 15, 22.

Rev. 0735C/22V10C-D–04/98

12 3 4 5 6 7 8

中文翻译

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