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ATF22LV10CQZ-30XU-T PDF预览

ATF22LV10CQZ-30XU-T

更新时间： 2024-02-05 04:55:25
品牌 Logo 应用领域
美国微芯 - MICROCHIP 时钟输入元件光电二极管可编程逻辑
页数 文件大小 规格书
19页 1813K
描述
Flash PLD, 30ns, CMOS, PDSO24

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ATF22LV10CQZ-30XU-T 技术参数

生命周期：Active包装说明：TSSOP,
Reach Compliance Code：compliant风险等级：5.67
最大时钟频率：25 MHzJESD-30 代码：R-PDSO-G24
长度：7.8 mm专用输入次数：11
I/O 线路数量：10端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
组织：11 DEDICATED INPUTS, 10 I/O输出函数：MACROCELL
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
可编程逻辑类型：FLASH PLD传播延迟：30 ns
座面最大高度：1.2 mm最大供电电压：5.5 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
宽度：4.4 mmBase Number Matches：1

ATF22LV10CQZ-30XU-T 数据手册

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3.7  
Power-up Reset  
The registers in the Atmel® ATF22LV10C are designed to reset during power-up. At a point delayed slightly from  
V
CC crossing VRST, all registers will be reset to the low state. The output state will depend on the polarity of the  
buffer.  
This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the  
uncertainty of how VCC actually rises in the system, the following conditions are required:  
1. The VCC rise must be monotonic and start below 0.7V  
2. The clock must remain stable during TPR  
3. After TPR, all input and feedback setup times must be met before driving the clock pin high  
3.8  
Preload of Register Outputs  
The ATF22LV10C registers are provided with circuitry to allow loading of each register with either a high or a low.  
This feature will simplify testing since any state can be forced into the registers to control test sequencing. A  
JEDEC file with preload is generated when a source file with vectors is compiled. Once downloaded, the JEDEC  
file preload sequence will be done automatically by most of the approved programmers after the programming.  
4.  
5.  
Electronic Signature Word  
There are 64-bits of programmable memory that are always available to the user, even if the device is secured.  
These bits can be used for user-specific data.  
Security Fuse Usage  
A single fuse is provided to prevent unauthorized copying of the ATF22LV10C fuse patterns. Once programmed,  
fuse verify and preload are inhibited. However, the 64-bit User Signature remains accessible.  
The security fuse should be programmed last, as its effect is immediate.  
6.  
7.  
Programming/Erasing  
Programming/erasing is performed using standard PLD programmers. See CMOS PLD Programming Hardware &  
Software Support for information on software/programming.  
Table 6-1.  
Programming/Erasing  
Parameter  
TPR  
Description  
Typ  
600  
2.5  
Max  
1,000  
3.0  
Units  
ns  
Power-up Reset Time  
Power-up Reset Voltage  
VRST  
V
Input and I/O Pin-keeper  
All ATF22V10C family members have internal input and I/O pin-keeper circuits. Therefore, whenever inputs or  
I/Os are not being driven externally, they will maintain their last driven state. This ensures that all logic array inputs  
and device outputs are at known states. These are relatively weak active circuits that can be easily overridden by  
TTL-compatible drivers (see Input and I/O diagrams on page 7).  
6
Atmel ATF22LV10C  
0780M–PLD–7/10  
1...3456789...19

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