5秒后页面跳转
ATF20V8B-25XC PDF预览

ATF20V8B-25XC

更新时间: 2024-10-27 22:39:19
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件光电二极管输入元件异步传输模式ATM时钟
页数 文件大小 规格书
17页 761K
描述
High- Performance EE PLD

ATF20V8B-25XC 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, PLASTIC, TSSOP-24
针数:24Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.75
Is Samacsys:N架构:PAL-TYPE
最大时钟频率:37 MHzJESD-30 代码:R-PDSO-G24
JESD-609代码:e0长度:7.8 mm
湿度敏感等级:2专用输入次数:12
I/O 线路数量:8输入次数:20
输出次数:8产品条款数:64
端子数量:24最高工作温度:70 °C
最低工作温度:组织:12 DEDICATED INPUTS, 8 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP24,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:5 V
可编程逻辑类型:FLASH PLD传播延迟:25 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Programmable Logic Devices最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

ATF20V8B-25XC 数据手册

 浏览型号ATF20V8B-25XC的Datasheet PDF文件第6页浏览型号ATF20V8B-25XC的Datasheet PDF文件第7页浏览型号ATF20V8B-25XC的Datasheet PDF文件第8页浏览型号ATF20V8B-25XC的Datasheet PDF文件第10页浏览型号ATF20V8B-25XC的Datasheet PDF文件第11页浏览型号ATF20V8B-25XC的Datasheet PDF文件第12页 
ATF20V8B  
ATF20V8B Complex Mode  
PAL Device Emulation/PAL Replacement  
In the Complex Mode, combinatorial output and I/O func-  
tions are possible. Pins 1 and 11 are regular inputs to the  
array. Pins 13 through 18 have pin feedback paths back to  
the AND-array, which makes full I/O capability possible.  
Pins 12 and 19 (outermost macrocells) are outputs only.  
They do not have input capability. In this mode, each mac-  
rocell has seven product terms going to the sum term and  
one product term enabling the output.  
Combinatorial applications with an OE requirement will  
make the compiler select this mode. The following devices  
can be emulated using this mode:  
20L8  
20H8  
20P8  
Complex Mode Operation  
ATF20V8B Simple Mode  
PAL Device Emulation / PAL Replacement  
In the Simple Mode, 8 product terms are allocated to the  
sum term. Pins 15 and 16 (center macrocells) are perma-  
nently configured as combinatorial outputs. Other macro-  
cells can be either inputs or combinatorial outputs with pin  
feedback to the AND-array. Pins 1 and 11 are regular  
inputs.  
The compiler selects this mode when all outputs are combi-  
natorial without OE control. The following simple PALs can  
be emulated using this mode:  
14L8 14H8 14P8  
16L6 18H6 16P6  
18L4 18H4 18P4  
20L2 20H2 20P2  
Simple Mode Option  
9

与ATF20V8B-25XC相关器件

型号 品牌 获取价格 描述 数据表
ATF20V8B-25XI ATMEL

获取价格

High- Performance EE PLD
ATF20V8B-7GC ETC

获取价格

Electrically-Erasable PLD
ATF20V8B-7JC ATMEL

获取价格

High- Performance EE PLD
ATF20V8B-7PC ATMEL

获取价格

High- Performance EE PLD
ATF20V8B-7SC ATMEL

获取价格

High- Performance EE PLD
ATF20V8B-7XC ATMEL

获取价格

High- Performance EE PLD
ATF20V8BL-10GC ETC

获取价格

Electrically-Erasable PLD
ATF20V8BL-10GI ETC

获取价格

Electrically-Erasable PLD
ATF20V8BL-10JC ETC

获取价格

Electrically-Erasable PLD
ATF20V8BL-10JI ETC

获取价格

Electrically-Erasable PLD