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ATF1508SE PDF预览

ATF1508SE

更新时间: 2024-10-28 04:33:19
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
69页 592K
描述
Family Datasheet

ATF1508SE 数据手册

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General  
Description  
Beginning with the introduction of the 100% connected ATF1500 with 32 enhanced macrocells  
in 1996, Atmel’s CPLD products have delivered extra IO connectivity and logic reusability.  
Atmel’s commitment to efficient, flexible architecture has continued with the current Atmel  
ATF15xxSE Family of industry-standard, pin-compatible CPLDs. Atmel’s Logic Doubling  
architecture consists of wider fan-in, additional routing and clock options, combined with  
sophisticated, proprietary device fitters, extend CPLD place and route efficiency. Atmel  
enhanced macrocell includes double independent buried feedback that allows designers to  
pack more logic (particularly shifters and latches) into a smaller CPLD or leave spare room for  
later revisions. The Atmel ATF15xxSE family delivers enhanced functionality and flexibility  
with no additional design effort and is highly cost effective.  
The Atmel ATF15xxSE Family includes all popular configurations and speeds.  
Table 1. ATF15xxSE Family Device Features  
Feature  
ATF1502SE(L)  
ATF1504SE(L)  
ATF1508SE(L)  
ATF1516SE(L)  
Usable Gates  
Macrocells  
750  
1500  
3000  
128  
6000  
256  
32  
64  
Logic Blocks  
Max. # Pins  
Max. User I/Os  
2
4
100  
8
16  
44  
36  
256  
256  
68  
100  
164  
T
PD Grades (ns)  
5, 6, 7, 10(15)  
5, 6, 7, 10(15)  
6, 7, 10(15)  
7, 10(15)  
The Atmel ATF15xxSE Family includes pin-compatible products in all popular packages.  
Table 2. ATF15xxSE Family Device Packages and Number of Signal Pins(1)(2)  
Packages  
ATF1502SE(L)  
ATF1504SE(L)  
ATF1508SE(L)  
ATF1516SE(L)  
44-pin PLCC  
44-pin TQFP  
84-pin PLCC  
100-pin TQFP  
100-pin PQFP  
160-pin PQFP  
208-pin PQFP  
208-pin RQFP  
36  
36  
36  
36  
68  
68  
68  
84  
84  
100  
164  
164  
Notes: 1. Contact Atmel for up-to-date information on device and package availability.  
2. When the JTAG port is used for In System Programming (ISP) or Boundary-scan Testing  
(BST), the four associated pins become JTAG pins and are unavailable for user I/O.  
2
ATF15xxSE Family  
2401D–PLD–09/02  

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EE PLD, 10ns, 128-Cell, PQFP100, 14 X 14 MM, 0.50 MM PITCH, PLASTIC, TQFP-100
ATF1508SE-10JC84 ATMEL

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EE PLD, 10ns, 128-Cell, PQCC84, PLASTIC, LCC-84
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EE PLD, 10ns, 128-Cell, PQCC84, PLASTIC, LCC-84
ATF1508SE-10QC100 ATMEL

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EE PLD, 10ns, 128-Cell, PQFP100, 14 X 20 MM, PLASTIC, QFP-100
ATF1508SE-10QC160 ATMEL

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EE PLD, 10ns, 128-Cell, PQFP160, 28 X 28 MM, PLASTIC, QFP-160
ATF1508SE-10QI100 ATMEL

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EE PLD, 10ns, 128-Cell, PQFP100, 14 X 20 MM, PLASTIC, QFP-100
ATF1508SE-10QI160 ATMEL

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EE PLD, 10ns, 128-Cell, PQFP160, 28 X 28 MM, PLASTIC, QFP-160
ATF1508SE-5AC100 ATMEL

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EE PLD, 6ns, 128-Cell, PQFP100, 14 X 14 MM, 0.50 MM PITCH, PLASTIC, TQFP-100