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ATF1508RE-7CU132 PDF预览

ATF1508RE-7CU132

更新时间: 2024-11-07 06:38:31
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
31页 765K
描述
Highperformance CPLD

ATF1508RE-7CU132 数据手册

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Features  
High-density, High-performance Fully CMOS, Electrically-erasable Complex  
Programmable Logic Device  
– 128 Macrocells  
– 5.0 ns Pin-to-pin Propagation Delay  
– Registered Operation up to 333 MHz  
– Enhanced Routing Resources  
– Optimized for 3.3V Operation  
– On-chip Voltage Regulator  
High-  
– 2 I/O Banks to Facilitate Multi-voltage I/O Operation: 1.5V, 1.8V, 2.5V, 3.3V  
– SSTL2 and SSTL3 I/O Standards  
performance  
CPLD  
In-System Programming (ISP) Supported  
– ISP Using IEEE 1532 (JTAG) Interface  
– IEEE 1149.1 JTAG Boundary Scan Test  
Flexible Logic Macrocell  
– D/T/Latch Configurable Flip-flops  
ATF1508RE  
– 5 Product Terms per Macrocell, Expandable up to 40  
– Global and Individual Register Control Signals  
– Global and Individual Output Enable  
– Programmable Output Slew Rate with Low Output Drive  
– Programmable Open Collector Output Option  
– Maximum Logic Utilization by Burying a Register with a Combinatorial Output and  
Vice Versa  
Fully Green (RoHS Compliant)  
As Low As 70 µA Standby Current  
Power Saving Option During Operation Using PD1 and PD2 Pins  
Programmable Pin-keeper Option on Inputs and I/Os  
Programmable Schmitt Trigger Input Option on Input and I/O Pins  
Programmable Input and I/O Pull-up Option  
Unused I/O Pins Can Be Configured as Ground (Optional)  
Available in Commercial and Industrial Temperature Ranges  
Available in 100-lead TQFP and 132-ball CBGA  
Advanced Digital CMOS Technology  
– 100% Tested  
– Completely Reprogrammable  
– 10,000 Program/Erase Cycles  
– 20-year Data Retention  
– 2000V ESD Protection  
– 200 mA Latch-up Immunity  
Security Fuse Feature  
Hot-Socketing Supported  
3682A–PLD–10/08  

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