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ATF1504ASV-15JI84 PDF预览

ATF1504ASV-15JI84

更新时间: 2024-01-26 01:40:45
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件
页数 文件大小 规格书
29页 312K
描述
Low-voltage, Complex Programmable Logic Device

ATF1504ASV-15JI84 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:LCC包装说明:PLASTIC, MS-018AF, LCC-84
针数:84Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.75
其他特性:YES最大时钟频率:100 MHz
系统内可编程:YESJESD-30 代码:S-PQCC-J84
JESD-609代码:e0JTAG BST:YES
长度:29.3115 mm湿度敏感等级:2
专用输入次数:I/O 线路数量:64
宏单元数:64端子数量:84
最高工作温度:85 °C最低工作温度:-40 °C
组织:0 DEDICATED INPUTS, 64 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC84,1.2SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):225
电源:2.5/3.3,3.3 V可编程逻辑类型:EE PLD
传播延迟:15 ns认证状态:Not Qualified
座面最大高度:4.572 mm子类别:Programmable Logic Devices
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:29.3115 mm
Base Number Matches:1

ATF1504ASV-15JI84 数据手册

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Programming  
ATF1504ASV(L) devices are in-system programmable (ISP) devices utilizing the 4-pin  
JTAG protocol. This capability eliminates package handling normally required for pro-  
gramming and facilitates rapid design iterations and field changes.  
Atmel provides ISP hardware and software to allow programming of the  
ATF1504ASV(L) via the PC. ISP is performed by using either a download cable, a com-  
parable board tester or a simple microprocessor interface.  
To facilitate ISP programming by the Automated Test Equipment (ATE) vendors. Serial  
Vector Format (SVF) files can be created by Atmel provided software utilities.  
ATF1504ASV(L) devices can also be programmed using standard third-party program-  
mers. With third-party programmer the JTAG ISP port can be disabled thereby allowing  
four additional I/O pins to be used for logic.  
Contact your local Atmel representatives or Atmel PLD applications for details.  
ISP Programming  
Protection  
The ATF1504ASV(L) has a special feature that locks the device and prevents the inputs  
and I/O from driving if the programming process is interrupted for any reason. The  
inputs and I/O default to high-Z state during such a condition. In addition the pin keeper  
option preserves the former state during device programming, if this circuit were previ-  
ously programmed on the device. This prevents disturbing the operation of other circuits  
in the system while the ATF1504ASV(L) is being programmed via ISP.  
All ATF1504ASV(L) devices are initially shipped in the erased state thereby making  
them ready to use for ISP.  
Note:  
For more information refer to the Designing for In-System Programmability with Atmel  
CPLDsapplication note.  
10  
ATF1504ASV(L)  
1409IPLD2/03  

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