5.
RF Transceiver in Half-duplex Mode
According to Figure 2-2 on page 6, the RF transceiver consists of an LNA (Low-Noise Amplifier), PA (Power Amplifier),
RX/TX switch, fractional-N frequency synthesizer and the signal processing part with mixer, IF filter, IF amplifier with analog
RSSI, FSK/ASK demodulator, data filter and data slicer.
In receive mode the LNA pre-amplifies the received signal which is converted down to 226kHz intermediate frequency (IF),
filtered and amplified before it is fed into an FSK/ASK demodulator, data filter and data slicer. The RSSI (Received Signal
Strength Indicator) signal and the raw digital output signal of the demodulator are available at the pins RSSI and on TEST3
(open drain output). The demodulated data signal Demod_Out is fed into the digital control logic where it is evaluated and
buffered as described in section “Digital Control Logic” on page 32.
In transmit mode the fractional-N frequency synthesizer generates the TX frequency which is fed into the PA. In ASK mode
the PA is modulated by the signal PA_Enable. In FSK mode the PA is enabled and the signal TX_DATA (FSK) modulates
the fractional-N frequency synthesizer. The frequency deviation is digitally controlled and internally fixed to about ±19.5kHz
(see Table 6-1 on page 25 for exact values). The transmit data can also be buffered as described in section “Digital Control
Logic” on page 32. A lock detector within the synthesizer ensures that the transmission will only start if the synthesizer is
locked.
In half-duplex mode the RX/TX switch can be used to combine the LNA input and the PA output to a single antenna with a
minimum of losses.
Transparent modes without buffering of RX and TX data are also available to allow protocols and coding schemes other than
the internal supported Manchester encoding, like PWM and pulse position coding.
5.1
Low-IF Receiver
The receive path consists of a fully integrated low-IF receiver. It fulfills the sensitivity, blocking, selectivity, supply voltage and
supply current specification needed to manufacture an automotive key fob for RKE and PEG systems without the use of a
SAW blocking filter (see Figure 3-1 on page 7). The receiver can be connected to the roof antenna in the car when using an
additional blocking SAW front-end filter as shown in Figure 4-1 on page 8.
At 433.92MHz the receiver has a typical system noise figure of 6.5dB, a system I1dBCP of –30dBm and a system IIP3 of
–20dBm. The signal path is linear for disturbers up to the I1dBCP and there is hence no AGC or switching of the LNA
needed to achieve a better blocking performance. This receiver uses an IF of about 226kHz (see Section 14. “Electrical
Characteristics: General” on page 61 number 2.10 for exact values), the typical image rejection is 30dB and the typical 3dB
system bandwidth is 220kHz (fIF = 226kHz ±110kHz, flo_IF = 116kHz and fhi_IF = 336kHz). The demodulator needs a signal to
noise ratio of 8dB for 20Kbit/s Manchester with ±19.5kHz frequency deviation in FSK mode, thus, the resulting sensitivity at
433.92MHz is typically –105.5dBm.
Due to the low phase noise and spurious of the synthesizer in receive mode(1) together with the eighth order integrated IF
filter the receiver has a better selectivity and blocking performance than more complex double superhet receivers, without
using external components and without numerous spurious receiving frequencies.
Note:
1. –120dBC/Hz at ±1MHz and –72dBC at ±fXTO at 433.92MHz
A low-IF architecture is also less sensitive to second-order intermodulation (IIP2) than direct conversion receivers where
every pulse or amplitude modulated signal (especially the signals from TDMA systems like GSM) demodulates to the
receiving signal band at second-order non-linearities.
ATA5823/ATA5824 [DATASHEET]
9
4829G–RKE–01/15
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