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AT93C56-10TI-2.7

更新时间： 2024-11-06 04:50:03
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
21页 372K
描述
Three-wire Serial EEPROMs

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AT93C56-10TI-2.7 数据手册

 浏览型号AT93C56-10TI-2.7的Datasheet PDF文件第2页浏览型号AT93C56-10TI-2.7的Datasheet PDF文件第3页浏览型号AT93C56-10TI-2.7的Datasheet PDF文件第4页浏览型号AT93C56-10TI-2.7的Datasheet PDF文件第5页浏览型号AT93C56-10TI-2.7的Datasheet PDF文件第6页浏览型号AT93C56-10TI-2.7的Datasheet PDF文件第7页 
Features  
• Low-voltage and Standard-voltage Operation  
– 2.7 (VCC = 2.7V to 5.5V)  
– 1.8 (VCC = 1.8V to 5.5V)  
• User-selectable Internal Organization  
– 1K: 128 x 8 or 64 x 16  
– 2K: 256 x 8 or 128 x 16  
– 4K: 512 x 8 or 256 x 16  
• Three-wire Serial Interface  
• 2 MHz Clock Rate (5V)  
• Self-timed Write Cycle (10 ms max)  
• High Reliability  
Three-wire  
Serial  
EEPROMs  
– Endurance: 1 Million Write Cycles  
– Data Retention: 100 Years  
• Automotive Grade, Extended Temperature and Lead-Free/Halogen-Free  
Devices Available  
• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP,  
and 8-ball dBGA2 Packages  
1K (128 x 8 or 64 x 16)  
2K (256 x 8 or 128 x 16)  
4K (512 x 8 or 256 x 16)  
Description  
The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable pro-  
grammable read-only memory (EEPROM), organized as 64/128/256 words of 16 bits  
each (when the ORG pin is connected to VCC), and 128/256/512 words of 8 bits each  
(when the ORG pin is tied to ground). The device is optimized for use in many indus-  
trial and commercial applications where low-power and low-voltage operations are  
essential. The AT93C46/56/66 is available in space-saving 8-lead PDIP, 8-lead  
JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, and 8-lead dBGA2  
packages.  
AT93C46  
AT93C56(1)  
AT93C66(2)  
The AT93C46/56/66 is enabled through the Chip Select pin (CS) and accessed via a  
three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift  
Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the  
data is clocked out serially on the DO pin. The Write cycle is completely self-timed,  
and no separate Erase cycle is required before Write. The Write cycle is only enabled  
when the part is in the Erase/Write Enable state. When CS is brought high following  
the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.  
Note: 1. This device is not recom-  
mended for new designs.  
Please refer to AT93C56A.  
2. This device is not recom-  
mended for new designs.  
Please refer to AT93C66A.  
The AT93C46/56/66 is available in 2.7V to 5.5V and 1.8V to 5.5V versions.  
Table 1. Pin Configurations  
8-lead SOIC  
8-lead dBGA2  
Pin Name  
CS  
Function  
8
7
6
5
1
2
3
4
VCC  
DC  
CS  
SK  
D1  
D0  
CS  
SK  
DI  
1
8
7
6
5
VCC  
DC  
Chip Select  
2
3
4
ORG  
GND  
ORG  
GND  
SK  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
Ground  
DO  
DI  
8-lead SOIC  
Rotated (R)  
(1K JEDEC Only)  
8-lead PDIP  
DO  
CS  
1
2
3
4
8
7
6
5
VCC  
DC  
VCC  
CS  
1
2
3
4
8
7
6
5
ORG  
GND  
DO  
SK  
DI  
DC  
GND  
VCC  
ORG  
DC  
ORG  
GND  
DO  
Power Supply  
Internal Organization  
Don’t Connect  
SK  
DI  
8-lead MAP  
8-lead TSSOP  
CS  
SK  
DI  
1
2
3
4
8
7
6
5
VCC  
8
7
6
5
1
2
3
4
VCC  
DC  
CS  
DC  
SK  
DI  
ORG  
GND  
ORG  
GND  
DO  
DO  
0172Z–SEEPR–9/05  
1234567...21

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AT93C56-10TI-2.7 替代型号

型号 品牌 替代类型 描述 数据表
AT93C56A-10TU-2.7 ATMEL

类似代替

 3-wire Serial EEPROMs 2K (256 x 8 or 128 x 16)
AT93C56A-10TI-2.7 ATMEL

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 3-wire Serial EEPROMs 2K (256 x 8 or 128 x 16)

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