Features
• Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
• User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
• Three-wire Serial Interface
• 2 MHz Clock Rate (5V)
• Self-timed Write Cycle (10 ms max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
• Automotive Grade Devices Available
• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead Ultra Thin mini-MAP
(MLP 2x3), 8-lead TSSOP and 8-ball dBGA2 Packages
Three-wire
Serial
EEPROM
Description
1K (128 x 8 or 64 x 16)
The AT93C46 provides 1024 bits of serial electrically erasable programmable read-
only memory (EEPROM), organized as 64 words of 16 bits each (when the ORG pin is
connected to VCC), and 128 words of 8 bits each (when the ORG pin is tied to
ground). The device is optimized for use in many industrial and commercial applica-
tions where low-power and low-voltage operations are essential. The AT93C46 is
available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead
Ultra Thin mini-MAP (MLP 2x3), 8-lead TSSOP, and 8-lead dBGA2 packages.
AT93C46
Note: Not recommended for new
design; please refer to
AT93C46D datasheet.
The AT93C46 is enabled through the Chip Select pin (CS) and accessed via a
three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the
data is clocked out serially on the DO pin. The Write cycle is completely self-timed,
and no separate Erase cycle is required before Write. The Write cycle is only enabled
when the part is in the Erase/Write Enable state. When CS is brought high following
the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.
The AT93C46 is available in 2.7V to 5.5V and 1.8V to 5.5V versions.
Table 1. Pin Configurations
8-lead SOIC
8-lead dBGA2
Pin Name
CS
Function
8
7
6
5
1
2
3
4
VCC
DC
CS
SK
D1
D0
CS
SK
DI
1
8
7
6
5
VCC
DC
Chip Select
2
3
4
ORG
GND
ORG
GND
SK
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
DO
Bottom View
DI
8-lead PDIP
8-lead SOIC
Rotated (R)
(1K JEDEC Only)
DO
CS
1
2
3
4
8
7
6
5
VCC
GND
VCC
ORG
DC
SK
DI
DC
DC
VCC
CS
1
2
3
4
8
7
6
5
ORG
GND
DO
ORG
GND
Power Supply
Internal Organization
Don’t Connect
DO
SK
DI
8-lead Ultra Thin mini-MAP (MLP 2x3)
8-lead TSSOP
8
7
6
5
1
2
3
4
VCC
DC
CS
SK
DI
CS
SK
DI
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
ORG
GND
DO
DO
Bottom View
5140B–SEEPR–2/07
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