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AT90SC6432R PDF预览

AT90SC6432R

更新时间: 2024-11-05 23:32:59
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其他 - ETC /
页数 文件大小 规格书
2页 35K
描述
AT90SC6432R Summary [Updated 11/02. 2 Pages] This document gives the key features. a brief description and a block diagram. The Complete is available under Non-Disclosure Agreement.

AT90SC6432R 数据手册

 浏览型号AT90SC6432R的Datasheet PDF文件第2页 
Features  
General  
High-performance, Low-power AVR® Enhanced RISC Architecture  
– 120 Powerful Instructions (Most Executed in a Single Clock Cycle)  
Low-power Idle and Power-down Modes  
Bond Pad Locations Conforming to ISO 7816/2  
ESD Protection to 6000V  
Operating Ranges: from 2.7V to 3.3V and 4.5V to 5.5V  
Compliant with GSM, 3GPP and EMV Specifications  
Available in Wafers, Modules and Industry-standard Packages  
Secure  
Microcontroller  
for Smart Cards  
Memory  
32K Bytes of EEPROM, Including 64-byte OTP Area and 64-byte Bit-addressable Area  
– 1 to 128-byte Program/Erase  
– 2 ms Program, 2 ms Erase  
– Typically More than 500,000 Write/Erase Cycles  
– 10 Years Data Retention  
64K Bytes of ROM Program Memory  
2K Bytes RAM  
AT90SC6432R  
Summary  
Peripherals  
I/O Port  
– Configurable to Support Communication Protocols Including ISO 7816-3  
16-bit Timer  
Random Number Generator (RNG)  
2-level, 8-vector Interrupt Controller  
Security  
Advanced Protection Against Physical Attack  
Environmental Protection Systems  
Voltage Monitor  
Frequency Monitor  
Secure Memory Management/Access Protection (Supervisor Mode)  
SPA/DPA Counter Measures  
Development Tools  
Hardware Development Support on Voyager Emulation Platform (ATV1)  
IAR System C-Spy® Debugger  
Software Libraries and Application Notes  
Rev. 1555BS–SMIC–11/02  
Note: This is a summary document. A complete document is  
available under NDA. For more information, please contact your  
local Atmel sales office.  

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