Features
• Compatible with MCS-51™ Products
• 8K Bytes of In-System Reprogrammable Downloadable Flash Memory
– SPI Serial Interface for Program Downloading
– Endurance: 1,000 Write/Erase Cycles
• 2K Bytes EEPROM
– Endurance: 100,000 Write/Erase Cycles
• 4V to 6V Operating Range
• Fully Static Operation: 0 Hz to 24 MHz
• Three-level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
8-bit
Microcontroller
with 8K Bytes
Flash
• Nine Interrupt Sources
• Programmable UART Serial Channel
• SPI Serial Interface
• Low-power Idle and Power-down Modes
• Interrupt Recovery From Power-down
• Programmable Watchdog Timer
• Dual Data Pointer
• Power-off Flag
AT89S8252
Description
The AT89S8252 is a low-power, high-performance CMOS 8-bit microcomputer with
8K bytes of downloadable Flash programmable and erasable read only memory and
2K bytes of EEPROM. The device is manufactured using Atmel’s high-density nonvol-
atile memory technology and is compatible with the industry-standard 80C51
instruction set and pinout. The on-chip downloadable Flash allows the program mem-
ory to be reprogrammed in-system through an SPI serial interface or by a
conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU
with downloadable Flash on a monolithic chip, the Atmel AT89S8252 is a powerful
microcomputer which provides a highly-flexible and cost-effective solution to many
embedded control applications.
The AT89S8252 provides the following standard features: 8K bytes of downloadable
Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines, programmable watch-
dog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level
interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In
addition, the AT89S8252 is designed with static logic for operation down to zero fre-
quency and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt sys-
tem to continue functioning. The Power-down mode saves the RAM contents but
freezes the oscillator, disabling all other chip functions until the next interrupt or hard-
ware reset.
The downloadable Flash can be changed a single byte at a time and is accessible
through the SPI serial interface. Holding RESET active forces the SPI bus into a serial
programming interface and allows the program memory to be written to or read from
unless Lock Bit 2 has been activated.
Rev. 0401E–02/00
1