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AT45DB011D-SSH- PDF预览

AT45DB011D-SSH-

更新时间: 2024-11-13 06:38:23
品牌 Logo 应用领域
爱特美尔 - ATMEL 闪存
页数 文件大小 规格书
52页 1609K
描述
1-megabit 2.7-volt Minimum DataFlash

AT45DB011D-SSH- 数据手册

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Features  
Single 2.7V to 3.6V Supply  
RapidS® Serial Interface: 66 MHz Maximum Clock Frequency  
– SPI Compatible Modes 0 and 3  
User Configurable Page Size  
– 256 Bytes per Page  
– 264 Bytes per Page  
– Page Size Can Be Factory Pre-configured for 256 Bytes  
Page Program Operation  
– Intelligent Programming Operation  
– 512 Pages (256/264 Bytes/Page) Main Memory  
Flexible Erase Options  
1-megabit  
2.7-volt  
– Page Erase (256 Bytes)  
Minimum  
DataFlash  
– Block Erase (2 Kbytes)  
– Sector Erase (32 Kbytes)  
– Chip Erase (1 Mbits)  
One SRAM Data Buffer (256/264 Bytes)  
Continuous Read Capability through Entire Array  
– Ideal for Code Shadowing Applications  
Low-power Dissipation  
AT45DB011D  
– 7 mA Active Read Current Typical  
– 25 µA Standby Current Typical  
– 5 µA Deep Power-down Typical  
Hardware and Software Data Protection Features  
– Individual Sector  
Sector Lockdown for Secure Code and Data Storage  
– Individual Sector  
Security: 128-byte Security Register  
– 64-byte User Programmable Space  
– Unique 64-byte Device Identifier  
JEDEC Standard Manufacturer and Device ID Read  
100,000 Program/Erase Cycles Per Page Minimum  
Data Retention – 20 Years  
Industrial Temperature Range  
Green (Pb/Halide-free/RoHS Compliant) Packaging Options  
1. Description  
The AT45DB011D is a 2.7V, serial-interface Flash memory ideally suited for a wide  
variety of digital voice-, image-, program code- and data-storage applications. The  
AT45DB011D supports RapidS serial interface for applications requiring very high  
speed operations. RapidS serial interface is SPI compatible for frequencies up to 66  
MHz. Its 1,081,344 bits of memory are organized as 512 pages of 256 bytes or 264  
bytes each. In addition to the main memory, the AT45DB011D also contains one  
SRAM buffer of 256/264 bytes. EEPROM emulation (bit or byte alterability) is easily  
handled with a self-contained three step read-modify-write operation. Unlike conven-  
tional Flash memories that are accessed randomly with multiple address lines and a  
parallel interface, the DataFlash® uses a RapidS serial interface to sequentially  
access its data. The simple sequential access dramatically reduces active pin count,  
facilitates hardware layout, increases system reliability, minimizes switching noise,  
and reduces package size.  
3639E–DFLASH–5/08  

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