Features
• Permanent Software Write Protection for the First-half of the Array
– Software Procedure to Verify Write Protect Status
• Hardware Write Protection for the Entire Array
• Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
• Internally Organized 256 x 8
• 2-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 100 kHz (1.8V) and 400 kHz (2.7V and 5.0V) Compatibility
• 16-byte Page Write Modes
• Partial Page Writes Are Allowed
• Self-timed Write Cycle (10 ms max)
• High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
• Automotive Grade and Extended Temperature Devices Available
• 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP Packages
2-wire Serial
EEPROM
with Permanent
Software Write
Protect
2K (256 x 8)
Description
The AT34C02 provides 2048 bits of serial electrically-erasable and programmable
read only memory (EEPROM) organized as 256 words of 8 bits each. The first-half of
the device incorporates a software write protection feature while hardware write pro-
tection for the entire array is available via an external pin as well. Once the software
write protection is enabled, by sending a special command to the device, it cannot be
reversed. The hardware write protection is controlled with the WP pin and can be used
to protect the entire array, whether or not the software write protection has been
enabled. This allows the user to protect none, first-half, or all of the array depending
on the application. The device is optimized for use in many industrial and commercial
applications where low-power and low-voltage operations are essential. The AT34C02
is available in space saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead
TSSOP packages and is accessed via a 2-wire serial interface. In addition, it is avail-
able in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
AT34C02
Pin Configurations
8-lead PDIP
8-lead MAP
Pin Name
A0 - A2
SDA
Function
Address Inputs
Serial Data
1
2
3
4
VCC
WP
SCL
SDA
8
7
6
5
A0
A1
A2
GND
A0
A1
1
2
3
4
8
7
6
5
VCC
WP
A2
SCL
SDA
SCL
Serial Clock Input
Write Protect
GND
WP
Bottom View
8-lead TSSOP
8-lead SOIC
A0
A1
A2
1
2
3
4
8
7
6
5
VCC
WP
A0
A1
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A2
SCL
SDA
GND
GND
Rev. 0958J–SEEPR–10/02
1