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AT27C800-15JC PDF预览

AT27C800-15JC

更新时间: 2024-10-25 23:32:15
品牌 Logo 应用领域
其他 - ETC 内存集成电路异步传输模式ATM可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
12页 281K
描述
x8/x16 EPROM

AT27C800-15JC 数据手册

 浏览型号AT27C800-15JC的Datasheet PDF文件第2页浏览型号AT27C800-15JC的Datasheet PDF文件第3页浏览型号AT27C800-15JC的Datasheet PDF文件第4页浏览型号AT27C800-15JC的Datasheet PDF文件第5页浏览型号AT27C800-15JC的Datasheet PDF文件第6页浏览型号AT27C800-15JC的Datasheet PDF文件第7页 
Features  
Read Access Time – 100 ns  
Word-wide or Byte-wide Configurable  
8-megabit Flash and Mask ROM Compatible  
Low-power CMOS Operation  
– 100 µA Maximum Standby  
– 50 mA Maximum Active at 5 MHz  
Wide Selection of JEDEC Standard Packages  
– 42-pin 600 mil PDIP  
– 44-lead PLCC  
– 44-lead SOIC (SOP)  
8-megabit  
(512K x 16 or  
1024K x 8)  
– 48-lead TSOP (12 mm x 20 mm)  
5V 10% Power Supply  
High-reliability CMOS Technology  
– 2,000 ESD Protection  
– 200 mA Latch-up Immunity  
Rapid™ Programming Algorithm – 50 µs/Word (Typical)  
CMOS- and TTL-compatible Inputs and Outputs  
Integrated Product Identification Code  
Commercial and Industrial Temperature Ranges  
OTP EPROM  
AT27C800  
Description  
The AT27C800 is a low-power, high-performance, 8,388,608-bit, UV-erasable, pro-  
grammable read-only memory (EPROM) organized as either 512K by 16 or 1024K by  
Not Recommended for  
New Designs  
(continued)  
Pin Configurations  
PDIP Top View  
SOIC (SOP)  
Pin Name  
A0 - A18  
O0 - O15  
O15/A-1  
Function  
A18  
A17  
A7  
1
2
3
4
5
6
7
8
9
42 NC  
NC  
A18  
A17  
A7  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
NC  
Addresses  
Outputs  
41 A8  
2
NC  
40 A9  
3
A8  
A6  
39 A10  
38 A11  
37 A12  
36 A13  
35 A14  
34 A15  
33 A16  
32 BYTE/VPP  
31 GND  
30 O15/A-1  
29 O7  
4
A9  
A5  
A6  
5
A10  
A11  
A12  
A13  
A14  
A15  
A16  
BYTE/VPP  
GND  
O15/A-1  
O7  
A4  
A5  
6
A3  
A4  
7
Output/Address  
A2  
A3  
8
A1  
A2  
9
Byte Mode/  
Program Supply  
A0 10  
CE 11  
GND 12  
OE 13  
O0 14  
O8 15  
O1 16  
O9 17  
O2 18  
O10 19  
O3 20  
O11 21  
A1  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
BYTE/VPP  
A0  
CE  
GND  
OE  
O0  
CE  
OE  
NC  
Chip Enable  
Output Enable  
No Connect  
28 O14  
27 O6  
O8  
O14  
O6  
26 O13  
25 O5  
O1  
O9  
O13  
O5  
24 O12  
23 O4  
O2  
O10  
O3  
O12  
O4  
22 VCC  
O11  
VCC  
TSOP  
Type 1  
PLCC Top View  
A15  
A14  
A13  
A12  
A11  
A10  
A9  
1
48  
A16  
BYTE/VPP  
GND  
O15/A-1  
O7  
2
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
3
4
A4  
A3  
A2  
7
8
9
39 A12  
5
38 A13  
37 A14  
36 A15  
35 A16  
6
O14  
O6  
7
A1 10  
A0 11  
CE 12  
GND 13  
OE 14  
O0 15  
O8 16  
O1 17  
A8  
8
O13  
O5  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
A18  
A17  
A7  
9
34 BYTE/VPP  
33 GND  
32 O15/A-1  
31 O7  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
O12  
O4  
VCC  
O11  
O3  
30 O14  
O10  
O2  
29 O6  
O9  
O1  
A6  
O8  
A5  
O0  
Note: PLCC Package Pin 23 is  
DONT CONNECT.  
Rev. 0801C–05/00  
A4  
OE  
A3  
GND  
CE  
A2  
A1  
A0  
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