Features
• Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 3.6V)
• Internally Organized as 32,768 x 8
• 2-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (5V), 400 kHz (2.7V, 2.5V) and 100 kHz (1.8V) Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 64-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5 ms Max)
2-wire Serial
EEPROM
• High Reliability
– Endurance: One Million Write Cycles
– Data Retention: 40 Years
• Extended Temperature and Lead-free/Halogen-free Devices Available
• 8-lead JEDEC PDIP, 8-lead JEDEC 12
256K (32,768 x 8)
• SOIC, 8-lead MAP, 8-lead TSSOP and 8-ball dBGA2TM Packages
Description
AT24C256B
The AT24C256B provides 262,144 bits of serial electrically erasable and programma-
ble read only memory (EEPROM) organized as 32,768 words of 8 bits each. The
device’s cascadable feature allows up to 8 devices to share a com mon 2-wire bus.
The device is optimized for use in many industrial and commercial applications where
low power and low voltage operation are essential. The devices are available in
space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 8-lead TSSOP
and 8-ball dBGA2 packages. In addition, the entire family is available in 2.7V (2.7V to
5.5V) and 1.8V (1.8V to 3.6V) versions.
Preliminary
Pin Configurations
8-lead PDIP
8-lead SOIC
Pin Name
A0–A2
SDA
Function
1
2
3
4
8
7
6
5
8
7
6
5
A0
A1
VCC
WP
A0
A1
1
2
3
4
VCC
WP
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No Connect
Ground
A2
SCL
SDA
A2
SCL
SDA
GND
GND
SCL
WP
8-lead dBGA2
8
8-lead TSSOP
NC
VCC
1
A0
8
A0
1
2
3
4
VCC
WP
SCL
SDA
7
6
5
2
3
4
A1
GND
7
6
5
A1
A2
WP
A2
SCL
SDA
GND
GND
8-lead MAP
VCC
WP
8
7
6
5
1
2
3
4
A0
A1
A2
SCL
SDA
GND
Rev. 0670O–SEEPR–7/04
1