Datasheet > AT202S08

AT202S08

更新时间： 2024-10-29 22:05:55

品牌	Logo	应用领域
POSEICO		/
页数	文件大小	规格书
4页	46K
描述
PHASE CONTROL THYRISTOR

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

AT202S08 数据手册

Via N. Lorenzi 8 - I 16152 GENOVA - ITALY

Tel. int. +39/(0)10 6556549 - (0)10 6556488

Fax Int. +39/(0)10 6442510

Ansaldo Trasporti s.p.a.

Unita' Semiconduttori

ANSALDO

Tx 270318 ANSUSE I -

PHASE CONTROL THYRISTOR AT202

Repetitive voltage up to

Mean on-state current

800 V

635 A

6 kA

Surge current

TARGET SPECIFICATION

Feb 97 - ISSUE : 03

[°C]

Symbol

Characteristic

Conditions

Value

Unit

BLOCKING

V RRM

V RSM

V DRM

I RRM

I DRM

Repetitive peak reverse voltage

Non-repetitive peak reverse voltage

Repetitive peak off-state voltage

Repetitive peak reverse current

Repetitive peak off-state current

150

800

900

800

V=VRRM

V=VDRM

CONDUCTING

I T (AV)

I TSM

I² t

Mean on-state current

Surge on-state current

I² t

180° sin, 50 Hz, Th=55°C, double side cooled

180° sin, 50 Hz, Tc=85°C, double side cooled

sine wave, 10 ms

635

575

150

without reverse voltage

180 x1E3

1.19

0.8

A²s

V T

On-state voltage

On-state current =

800 A

150

V T(TO)

r T

Threshold voltage

On-state slope resistance

150 0.490

mohm

SWITCHING

di/dt

dv/dt

Critical rate of rise of on-state current, min. From 75% VDRM up to 450 A, gate 10V 5ohm

Critical rate of rise of off-state voltage, min. Linear ramp up to 70% of VDRM

150

320

500

1.6

A/µs

V/µs

µs

Gate controlled delay time, typical

Circuit commutated turn-off time, typical

Reverse recovery charge

VD=100V, gate source 10V, 10 ohm , tr=.5 µs

dV/dt = 20 V/µs linear up to 75% VDRM

di/dt=-20 A/µs, I= 290 A

200

µs

Q rr

I rr

I H

150

µC

Peak reverse recovery current

Holding current, typical

VR= 50 V

VD=5V, gate open circuit

VD=5V, tp=30µs

300

700

I L

Latching current, typical

GATE

V GT

Gate trigger voltage

VD=5V

3.5

200

0.25

I GT

Gate trigger current

VD=5V

V GD

V FGM

Non-trigger gate voltage, min.

Peak gate voltage (forward)

Peak gate current

VD=VDRM

150

FGM

V RGM

P GM

P G

Peak gate voltage (reverse)

Peak gate power dissipation

Average gate power dissipation

Pulse width 100 µs

MOUNTING

R th(j-h)

Thermal impedance, DC

Thermal impedance

Junction to heatsink, double side cooled

Case to heatsink, double side cooled

°C/kW

R th(c-h)

T j

Operating junction temperature

Mounting force

-30 / 150

4.9 / 5.9

°C

Mass

ORDERING INFORMATION : AT202 S 08

VDRM&VRRM/100

standard specification

12 3 4

中文翻译

下载PDF

与AT202S08相关器件

型号	品牌	获取价格	描述	数据表
AT-203	HRS	获取价格	Fixed Attenuators (SMA Type)
AT-203(40)	HRS	获取价格	Fixed Attenuator, 0MHz Min, 18000MHz Max, ROHS COMPLIANT PACKAGE
AT2041	BCDSEMI	获取价格	Higher Surge ITVS, 4 I/Os, CI/O-VSS<1.5pF, with VCC
AT2041K6-5.0TRG1	BCDSEMI	获取价格	Higher Surge ITVS, 4 I/Os, CI/O-VSS<1.5pF, with VCC
AT2042	BCDSEMI	获取价格	General Purpose ITVS, 4 I/Os, CI/O-VSS<1.5pF
AT2042K6-5.0TRG1	BCDSEMI	获取价格	General Purpose ITVS, 4 I/Os, CI/O-VSS<1.5pF
AT-206	HRS	获取价格	Fixed Attenuators (SMA Type)
AT-206(40)	HRS	获取价格	Fixed Attenuator, 0MHz Min, 18000MHz Max, ROHS COMPLIANT PACKAGE
AT-20-75	MINI	获取价格	Fixed Attenuator, 0MHz Min, 500MHz Max, CASE A04
AT20-75	ETC	获取价格	Analog IC

与AT202S08相关文章

三星深化印度制造布局，供应链本地化进程加速
2024-10-29

18
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

20
纳微科技震撼发布GaNSlim革新氮化镓功率芯片
2024-10-18

45
意法半导体发布第四代SiC技术，助力电动汽车电驱
2024-10-15

52

产品中心

服务支持

精选活动

关于我们

帮助中心

AT202S08

AT202S08 数据手册

与AT202S08相关器件

与AT202S08相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

AT202S08

AT202S08 数据手册

与AT202S08相关器件

与AT202S08相关文章

您还可以找

您在本页遇到什么问题？