5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 时钟驱动器> ASM5P23S09AF-1H-16-ST
ASM5P23S09AF-1H-16-ST PDF预览

ASM5P23S09AF-1H-16-ST

更新时间： 2024-11-24 06:38:15
品牌 Logo 应用领域
PULSECORE 时钟驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
18页 353K
描述
3.3V ‘SpreadTrak’ Zero Delay Buffer

阅读下载

中文翻译

获取价格

ASM5P23S09AF-1H-16-ST 技术参数

是否Rohs认证：符合生命周期：Obsolete
包装说明：0.150 INCH, ROHS COMPLIANT, SOIC-16Reach Compliance Code：unknown
风险等级：5.65Is Samacsys：N
系列：23S输入调节：STANDARD
JESD-30 代码：R-PDSO-G16长度：9.905 mm
逻辑集成电路类型：PLL BASED CLOCK DRIVER功能数量：1
反相输出次数：端子数量：16
实输出次数：8最高工作温度：70 °C
最低工作温度：输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
Same Edge Skew-Max（tskwd）：0.25 ns座面最大高度：1.75 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3.9 mm最小 fmax：133 MHz
Base Number Matches：1

ASM5P23S09AF-1H-16-ST 数据手册

 浏览型号ASM5P23S09AF-1H-16-ST的Datasheet PDF文件第2页浏览型号ASM5P23S09AF-1H-16-ST的Datasheet PDF文件第3页浏览型号ASM5P23S09AF-1H-16-ST的Datasheet PDF文件第4页浏览型号ASM5P23S09AF-1H-16-ST的Datasheet PDF文件第5页浏览型号ASM5P23S09AF-1H-16-ST的Datasheet PDF文件第6页浏览型号ASM5P23S09AF-1H-16-ST的Datasheet PDF文件第7页 
ASM5P23S05A  
ASM5P23S09A  
November 2006  
rev 1.5  
3.3V ‘SpreadTrak’ Zero Delay Buffer  
General Features  
out five low-skew clocks.  
•
15MHz to 133MHz operating range, compatible  
The -1H version of the ASM5P23SXXA operates at up to  
133MHz frequency, and has higher drive than the -1  
device. All parts have on-chip PLLs that lock to an input  
clock on the REF pin. The PLL feedback is on-chip and is  
obtained from the CLKOUT pad.  
with CPU and PCI bus frequencies.  
Zero input - output propagation delay.  
Multiple low-skew outputs.  
•
•
•
Output-output skew less than 250pS.  
Device-device skew less than 700pS.  
•
•
One input drives 9 outputs, grouped as 4+4+1  
(ASM5P23S09A).  
One input drives 5 outputs (ASM5P23S05A).  
Less than 200pS cycle-to-cycle jitter is compatible  
with Pentium® based systems.  
Test Mode to bypass PLL (ASM5P23S09A only,  
refer Select Input Decoding Table).  
Available in 16-pin, 150-mil SOIC and 4.4 mm  
TSSOP packages for ASM5P23S09A and in  
8-pin, 150-mil SOIC and 4.4 mm TSSOP  
packages for ASM5P23S05A.  
The ASM5P23S09A has two banks of four outputs each,  
which can be controlled by the Select inputs as shown in  
the Select Input Decoding Table. If all the output clocks are  
not required, Bank B can be three-stated. The select input  
also allows the input clock to be directly applied to the  
outputs for chip and system testing purposes.  
•
•
•
•
Multiple ASM5P23S09A and ASM5P23S05A devices can  
accept the same input clock and distribute it. In this case  
the skew between the outputs of the two devices is  
guaranteed to be less than 700pS.  
•
•
•
3.3V operation  
Advanced 0.35µ CMOS technology.  
‘SpreadTrak’.  
All outputs have less than 200 pS of cycle-to-cycle jitter.  
The input and output propagation delay is guaranteed to be  
less than 350 pS, and the output to output skew is  
guaranteed to be less than 250 pS.  
Functional Description  
ASM5P23S09A is a versatile, 3.3V zero-delay buffer  
designed to distribute high-speed clocks with Spread  
Spectrum capability. It is available in a 16-pin package. The  
ASM5P23S05A is the eight-pin version of the  
ASM5P23S09A. It accepts one reference input and drives  
The ASM5P23S09A and the ASM5P23S05A are available  
in two different configurations, as shown in the ordering  
information table. The ASM5P23SXXA-1 is the base part.  
The ASM5P23SXXA-1H is the high drive version of the -1  
part and its rise and fall times are much faster than -1 part.  
Block Diagram  
MUX  
PLL  
CLKOUT  
CLKA1  
CLKA2  
CLKA3  
PLL  
REF  
CLKOUT  
REF  
CLK1  
CLK2  
CLK3  
CLK4  
CLKA4  
CLKB1  
CLKB2  
CLKB3  
CLKB4  
S2  
S1  
Select Input  
Decoding  
ASM5P23S09A  
ASM5P23S05A  
PulseCore Semiconductor Corporation  
1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018  
www.pulsecoresemi.com  
Notice: The information in this document is subject to change without notice.  
1234567...18

中文翻译

下载PDF

与ASM5P23S09AF-1H-16-ST相关器件

型号 品牌 获取价格 描述 数据表
ASM5P23S09AF-1H-16-TR ALSC

获取价格

 		3.3V SpreadTrak Zero Delay Buffer
ASM5P23S09AF-1H-16-TR PULSECORE

获取价格

 		3.3V ‘SpreadTrak’ Zero Delay Buffer
ASM5P23S09AF-1H-16-TT ALSC

获取价格

 		3.3V SpreadTrak Zero Delay Buffer
ASM5P23S09AF-1H-16-TT PULSECORE

获取价格

 		3.3V ‘SpreadTrak’ Zero Delay Buffer
ASM5P23S09AG-1-16-SR PULSECORE

获取价格

 		3.3V ‘SpreadTrak’ Zero Delay Buffer
ASM5P23S09AG-1-16-ST PULSECORE

获取价格

 		3.3V ‘SpreadTrak’ Zero Delay Buffer
ASM5P23S09AG-1-16-TR PULSECORE

获取价格

 		3.3V ‘SpreadTrak’ Zero Delay Buffer
ASM5P23S09AG-1-16-TT PULSECORE

获取价格

 		3.3V ‘SpreadTrak’ Zero Delay Buffer
ASM5P23S09AG-1H-16-SR PULSECORE

获取价格

 		3.3V ‘SpreadTrak’ Zero Delay Buffer
ASM5P23S09AG-1H-16-ST PULSECORE

获取价格

 		3.3V ‘SpreadTrak’ Zero Delay Buffer

与ASM5P23S09AF-1H-16-ST相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证