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ASDMPC-27.000MHZ-LR-T3 PDF预览

ASDMPC-27.000MHZ-LR-T3

更新时间: 2024-11-06 20:07:15
品牌 Logo 应用领域
ABRACON 石英晶振
页数 文件大小 规格书
6页 3916K
描述
XO, Clock, 2.3MHz Min, 170MHz Max, 27MHz Nom, CMOS,

ASDMPC-27.000MHZ-LR-T3 技术参数

是否Rohs认证: 符合生命周期:Active
Reach Compliance Code:compliantFactory Lead Time:14 weeks
风险等级:5.84安装特点:SURFACE MOUNT
端子数量:6最大工作频率:170 MHz
最小工作频率:2.3 MHz标称工作频率:27 MHz
最高工作温度:85 °C最低工作温度:-40 °C
最大输出低电流:6 mA封装主体材料:PLASTIC/EPOXY
封装等效代码:SOLCC6,.08,32电源:2.5/3.3 V
认证状态:Not Qualified子类别:XO, Clock
最大压摆率:35 mA表面贴装:YES
技术:CMOSBase Number Matches:1

ASDMPC-27.000MHZ-LR-T3 数据手册

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PERFORMANCE PLASTIC PACKAGE ULTRA MINIATURE  
PURE SILICONTM CLOCK OSCILLATORS  
RoHS/RoHS II compliant  
ASDMP Series  
Pb  
2.5 x 2.0 x 0.85mm  
Moisture Sensitivity Level – MSL 1  
APPLICATIONS:  
FEATURES:  
• Ultra Miniature Pure SiliconTM Clock Oscillator  
• High Performance MEMS Technology by Discera  
• Low Power Consumption for high speed communication  
• Exceptional Stability Over Temp. at -40 to +85°C, ±15ppm  
• Extended Automotive Grade Temp. stability at -55 to +125°C, ±25ppm  
• MIL-STD-883 shock and vibration compliant  
• Storage Area Networks (SATA, SAS, Fiber Channel)  
• Passive Optical Networks (EPON, 10G-EPON, GPON, 10G-PON)  
• Ethernet (1G, 10GBASE-T,/KR/LR/SR, FCoE  
• PCI Express  
• Display port  
• Durable QFN Plastic Compact Packaging  
• Standby or Disable Tri-state function  
• Low jitter (Period jitter RMS and Phase jitter RMS)  
• High power supply noise reduction, -50dBc  
STANDARD SPECIFICATIONS:  
Common Key Electrical Specifications – CMOS, LVPECL, LVDS, and HCSL  
Parameters  
Minimum  
Typical  
Maximum  
Units  
Notes  
-20 ~ +70°C  
-40 ~ +85°C  
-40 ~ +105°C  
-55 ~ +125°C  
CMOS  
CMOS  
LVPECL  
LVDS  
2.3000*  
170.0000  
3.3000*  
2.3000*  
2.3000*  
2.3000*  
170.0000  
460.0000  
460.0000  
460.0000  
Commercial, Industrial  
temp. range  
Commercial, Industrial  
temp range  
Commercial, Industrial  
temp. range  
Frequency Range  
MHz  
HCSL  
Operating Temperature  
Storage Temperature  
Overall Frequency Stability  
Supply Voltage (Vdd)  
Startup Time  
-20  
-55  
-50  
+70  
+150  
+50  
+3.6  
5
°C  
°C  
See options  
ppm See options  
V
ms  
+2.25  
20  
5
5
22  
ns  
ms  
ns  
STD (Tri-state)  
PD option (Power Down)  
Enable Time  
Disable Time  
Disable Current  
20  
STD (Tri-state)  
mA  
V
0.095  
PD option (Power Down)  
40kpull-up resister  
embedded  
"1" (VIH0.75*Vdd) or Open: Oscillation  
Tri-state Function (Standby/Disable)  
Aging  
"0" (VIL<0.25*Vdd) : Hi Z  
-5.0  
+5.0  
ppm First year  
* For 2.3000MHz < F0 < 9.9999MHz, 6-8 weeks lead-time applies  
Key Electrical Specifications – CMOS  
Parameters  
Supply Current (Idd)  
Minimum  
Typical  
Maximum Units  
Notes  
31  
35  
mA CL=15pF, 125MHz  
VOH  
VOL  
Tr  
0.9*Vdd  
V
V
ns  
ns  
%
Output Logic Level  
I=±6mA  
0.1*Vdd  
Rise Time  
Fall Time  
Duty Cycle  
1.1  
1.3  
2.0  
2.0  
55  
2
2
2
CL=15pF  
20% to 80%  
Tf  
45  
200kHz ~ 20MHz@125MHz  
100kHz ~ 20MHz@125MHz  
12kHz ~ 20MHz@125MHz  
0.30  
0.38  
1.70  
3.0  
Integrated Phase Jitter (JPH)  
ps  
ps  
Period Jitter RMS (JPER  
)
REVISED: 12.6.2017  
5101 Hidden Creek Ln Spicewood TX 78669  
Phone: 512-371-6159 | Fax: 512-351-8858  
For terms and conditions of sales, please visit: www.abracon.com  
ABRACON IS  
ISO9001-2008  
CERTIFIED  
LLC  

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